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ICM7228 Datasheet, PDF (13/17 Pages) Intersil Corporation – 8-Digit, Microprocessor- Compatible, LED Display Decoder Driver
ICM7228
TABLE 5. DIGITS ADDRESS, ICM7228A/B
INPUT DATA LINES
1D2
lD2
lD0
SELECTED DIGIT
0
0
0
DlGlT 1
0
0
1
DlGlT 2
0
1
0
DIGlT 3
0
1
1
DlGlT 4
1
0
0
DIGIT 5
1
0
1
DlGlT 6
1
1
0
DlGlT 7
1
1
1
DlGlT 8
System Interfacing, ICM7228C and ICM7228D
The ICM7228C/D devices are directly compatible with the
architecture of most microprocessor systems. Their fast
switching characteristics make it possible to access them as a
memory mapped I/O device with no wait state necessary in
most microcontroller systems. All the ICM7228C/D inputs,
excluding HEXA/CODE B/SHUTDOWN, feature a 250ns min-
imum setup and 0ns hold time with a 200ns minimum WRITE
pulse. Input logic levels are TTL and CMOS compatible. Fig-
ure 10 shows a generic method of driving the ICM7228C/D
from a microprocessor bus. To the microprocessor, the 8
bytes of the Display RAM appear to be 8 separate I/O loca-
tions. Loading the ICM7228C/D is quite similar to a standard
memory write cycle. The address of the digit to be updated is
placed on lines DA0 - DA2, the data to be written is placed on
lines ID0 - lD3 and ID7, then a low pulse on WRITE input will
transfer the data in. See Figure 3 and Switching Characteris-
tics Table for write cycle timing parameters.
The ICM7228C/D devices do not have any control register, and
also they do not provide the No Decode display format. Hexa-
decimal or Code B character selection and shutdown mode are
directly controlled through the three level input at Pin 9, which is
accordingly called HEXA/CODE B/SHUTDOWN. See Tables 3
and 4 for input and output definitions of the ICM7228C/D
devices.
Display Formats
The ICM7228A and ICM7228B have three possible display
formats; Hexadecimal, Code B and No Decode. Table 6
shows the character sets for the decode modes and their
corresponding input code.
The display formats of the ICM7228A/B are selected by
writing data to bits ID4, ID5 and ID6 of the Control Register
(See Table 1 and 2 for input Definitions). Hexadecimal and
Code B data is entered via ID0-lD3 and ID7 controls the
decimal point.
TABLE 6. DISPLAY CHARACTER SETS
INPUT DATA CODE
ID3 ID2 ID1
DISPLAY CHARACTERS
ID0 HEXADECIMAL CODE B
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
0
2
2
0
0
1
1
3
3
0
1
0
0
4
4
0
1
0
1
5
5
0
1
1
0
6
6
0
1
1
1
7
7
1
0
0
0
8
8
1
0
0
1
9
9
1
0
1
0
A
-
1
0
1
1
b
E
1
1
0
0
C
H
1
1
0
1
d
L
1
1
1
0
E
P
1
1
1
1
F
(Blank)
I/O OR
MEMORY
WRITE PULSE
A3 - A15
DATA BUS D0 - D7
5
DECODER
ENABLE
ADDRESS
DECODER
DEVICE SELECT
AND
WRITE PULSE
ID0 - ID3
AND ID7
INTERSIL
ICM7228C/D
SEGMENTS
WRITE
DRIVE
A0 - A2
DA0 - DA2
DIGITS
DRIVE
ADDRESS BUS A0 - A15
FIGURE 10. ICM7228C/D MICROPROCESSOR SYSTEM INTERFACING
LED DISPLAY
9-29