X9460 Datasheet, PDF (12/16 Pages) Intersil Corporation – Dual Audio Control Digitally Controlled Potentiometer

A.C. Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Level
X9460
V_CC x 0.1 to V_CC x 0.9
10ns
V_CC x 0.5
Equivalent A.C. Load Circuit
5V
1533Ω
SDA OUTPUT
100pF
AC TIMING Over recommended operating conditions
SYMBOL
PARAMETER
f_SCL
Clock Frequency
t_CYC
Clock Cycle Time
t_HIGH
Clock High Time
t_LOW
Clock Low Time
t_SU:STA Start Setup Time
t_HD:STA Start Hold Time
t_SU:STO Stop Setup Time
t_SU:DAT SDA Data Input Setup Time
t_HD:DAT SDA Data Input Hold Time
t_R (Note 2) SCL and SDA Rise Time
t_F (Note 2) SCL and SDA Fall Time
t_AA (Note 2) SCL Low to SDA Data Output Valid Time
t_DH (Note 2) SDA Data Output Hold Time
T_I (Note 2) Noise Suppression Time Constant at SCL and SDA inputs
t_BUF (Note 2) Bus Free Time (Prior to Any Transmission)
t_SU:WPA A0, A1 (Note 2)
t_HD:WPA A0, A1 (Note 2)
DC Timing (Note 2)
SYMBOL
PARAMETER
t_WRPO
t_WRL
t_WRID
Wiper Response Time After The Third (Last) Power Supply Is Stable
Wiper Response Time After Instruction Issued (All Load Instructions)
Wiper Response Time From An Active SCL Edge (Increment/Decrement Instruction)
MIN
2500
600
1300
600
600
600
500
50
50
50
1300
0
0
MAX
400
300
300
900
UNITS
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MIN MAX UNITS
10
µs
10
µs
10
µs
12
FN8203.2
October 17, 2005