ISL6754 Datasheet, PDF (12/19 Pages) Intersil Corporation – ZVS Full-Bridge PWM Controller with Adjustable Synchronous Rectifier Control

ISL6754
If voltage-mode control is used in a bridge topology, it should
be noted that peak current limit results in inherently unstable
operation. DC blocking capacitors used in voltage-mode
bridge topologies become unbalanced, as does the flux in
the transformer core. The average overcurrent circuitry
prevents this behavior by maintaining symmetric duty cycles
for each half-cycle. If the average current limit circuitry is not
used, a latching overcurrent shutdown method using
external components is recommended.
The CS to output propagation delay is increased by the
leading edge blanking (LEB) interval. The effective delay is
the sum of the two delays and is 130ns maximum.
Voltage Feed Forward Operation
Voltage feed forward is a technique used to regulate the
output voltage for changes in input voltage without the
intervention of the control loop. Voltage feed forward is
implemented in voltage-mode control loops, but is redundant
and unnecessary in peak current-mode control loops.
Voltage feed forward operates by modulating the sawtooth
ramp in direct proportion to the input voltage. Figure 8
demonstrates the concept.
VIN
ERROR VOLTAGE
RAMP
CT
OUTLL, LR
FIGURE 8. VOLTAGE FEED FORWARD BEHAVIOR
Input voltage feed forward may be implemented using the
RAMP input. An RC network connected between the input
voltage and ground, as shown in Figure 9, generates a
voltage ramp whose charging rate varies with the amplitude
of the source voltage. At the termination of the active output
pulse, RAMP is discharged to ground so that a repetitive
sawtooth waveform is created. The RAMP waveform is
compared to the VERR voltage to determine duty cycle. The
selection of the RC components depends upon the desired
input voltage operating range and the frequency of the
oscillator. In typical applications, the RC components are
selected so that the ramp amplitude reaches 1.0V at
minimum input voltage within the duration of one half-cycle.
VIN
R3
C7
1
20
2
19
3
18
4
17
ISL6754
5
16
6
15
7
14
8 RAMP
13
9
12
10
GND 11
FIGURE 9. VOLTAGE FEED FORWARD CONTROL
The charging time of the ramp capacitor is:
t
=
–R3
⋅
C7
⋅
ln
⎛
⎜1
⎝
–
-^V----^R---_V-^A----_IM-_N----^P-₍--_M-⁽--^P--_I-_N-^E---₎^A----^K----⁾_{⎠⎟⎞}
S
(EQ. 7)
For optimum performance, the maximum value of the
capacitor should be limited to 10nF. The maximum DC
current through the resistor should be limited to 2mA
maximum. For example, if the oscillator frequency is
400kHz, the minimum input voltage is 300V, and a 4.7nF
ramp capacitor is selected, the value of the resistor can be
determined by rearranging Equation 7.
R3 = -----------------------------------–---^t----------------------------------- = -----------------–---²---^.--⁵-----^â‹---¹---⁰----^–--⁶------------------
C7
⋅
ln
⎛
⎜1
⎝
–
V_{-----R--V--A--I--MN----(-P-M---(--PI--N--E---)A--)--K----)⎠⎟⎞}
4.7 ⋅ 10^–9 ⋅ ln _⎝⎛1 – ₃----₀₁---₀--_⎠⎞
= 159 kΩ
(EQ. 8)
where t is equal to the oscillator period minus the deadtime.
If the deadtime is short relative to the oscillator period, it can
be ignored for this calculation.
If feed forward operation is not desired, the RC network may
be connected to V_REF rather than the input voltage.
Alternatively, a resistor divider from CTBUF may be used as
the sawtooth signal. Regardless, a sawtooth waveform must
be generated on RAMP as it is required for proper PWM
operation.
Gate Drive
The ISL6754 outputs are capable of sourcing and sinking
10mA (at rated VOH, VOL) and are intended to be used in
conjunction with integrated FET drivers or discrete bipolar
totem pole drivers. The typical on resistance of the outputs is
50Ω.
12
FN6754.1
September 29, 2008