ISL6522B Datasheet, PDF (12/15 Pages) Intersil Corporation – Buck and Synchronous Rectifier Pulse-Width Modulator (PWM) Controller

ISL6522B
+12V
VCC
ISL6522B
-
+
D_BOOT
+-
V_D
+5V OR +12V
BOOT
UGATE
C_BOOT
Q1
PHASE
NOTE:
V_G-S ≈ V_CC - V_D
+5V
PVCC ^{OR +12V}
LGATE
Q2
PGND
D2
NOTE:
V_G-S ≈ PVCC
GND
FIGURE 9. UPPER GATE DRIVE - BOOTSTRAP OPTION
Figure 10 shows the upper gate drive supplied by a direct
connection to V_CC. This option should only be used in
converter systems where the main input voltage is +5V_DC or
less. The peak upper gate-to-source voltage is
approximately V_CC less the input supply. For +5V main
power and +12V_DC for the bias, the gate-to-source voltage
of Q1 is 7V. A logic-level MOSFET is a good choice for Q1
and a logic-level MOSFET can be used for Q2 if its absolute
gate-to-source voltage rating exceeds the maximum voltage
applied to PV_CC.
+12V
VCC
+5V OR LESS
ISL6522B
-
+
BOOT
Q1
UGATE
PHASE
+5V
OR +12V
PVCC
Q2
LGATE
PGND
NOTE:
V_G-S ≈ V_CC - 5V
D2
NOTE:
V_G-S ≈ PVCC
GND
FIGURE 10. UPPER GATE DRIVE - DIRECT V_CC DRIVE OPTION
Schottky Selection
Rectifier D2 is a clamp that catches the negative inductor
swing during the dead time between turning off the lower
MOSFET and turning on the upper MOSFET. The diode
must be a Schottky type to prevent the lossy parasitic
MOSFET body diode from conducting. It is acceptable to
omit the diode and let the body diode of the lower MOSFET
clamp the negative inductor swing, but efficiency will drop
one or two percent as a result. The diode's rated reverse
breakdown voltage must be greater than the maximum input
voltage.
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