ISL6263C Datasheet, PDF(12/18 Page) Intersil Corporation – 5-Bit VID Single-Phase Voltage Regulator with Current Monitor for GPU Core Power

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ISL6263C Datasheet, PDF (12/18 Pages) Intersil Corporation – 5-Bit VID Single-Phase Voltage Regulator with Current Monitor for GPU Core Power

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ISL6263C

For example, choose VICOMP(max) - VO = 80mV. ROCSET

can use a 8.06kâ¦ resistor, according to Equation 2.

UVP and OVP are independent of the OCP. If the output

voltage measured on the VO pin is less than +300mV below

the voltage on the SOFT pin for longer than 1ms, the

controller will latch a UVP fault. If the output voltage

measured on the VO pin is >195mV above the voltage on

the SOFT pin for longer than 1ms, the controller will latch an

OVP fault. Keep in mind that VSOFT will equal the voltage

level commanded by the VID states only after the soft-start

capacitor CSOFT has slewed to the VID DAC output voltage.

The UVP and OVP detection circuits act on static and

dynamic VSOFT voltage.

When an OCP, OVP, or UVP fault has been latched, PGOOD

becomes a low impedance and the gate driver outputs

UGATE and LGATE are pulled low. The energy stored in the

inductor is dissipated as current flows through the low-side

MOSFET body diode. The controller will remain latched in

the fault state until the VR_ON pin has been pulled below the

falling VR_ON threshold voltage VVR_ONL or until VDD has

gone below the falling POR threshold voltage VVDD_THF.

A severe-overvoltage protection fault occurs immediately after

the voltage between the VO and VSS pins exceed the rising

severe-overvoltage threshold VOVPS which is 1.545V, the

same reference voltage used by the VID DAC. The ISL6263C

will latch UGATE and PGOOD low but unlike other protective

faults, LGATE remains high until the voltage between VO and

VSS falls below approximately 0.77V, at which time LGATE is

pulled low. The LGATE pin will continue to switch high and low

at 1.545V and 0.77V until VDD has gone below the falling

POR threshold voltage VVDD_THF. This provides maximum

protection against a shorted high-side MOSFET while

preventing the output voltage from ringing below ground. The

severe-overvoltage fault circuit can be triggered after another

fault has already been latched.

TABLE 3. FAULT PROTECTION SUMMARY OF

ISL6263C

FAULT TYPE

FAULT

DURATION

PRIOR TO

PROTECTION

ACTIONS

FAULT

RESET

Overcurrent

120Âµs

LGATE, UGATE, and Cycle

PGOOD latched low VR_ON or

VDD

Short Circuit

<2Âµs

LGATE, UGATE, and Cycle

PGOOD latched low VR_ON or

VDD

Overvoltage

(+195mV)

between VO pin

and SOFT pin

1ms

LGATE, UGATE, and Cycle

PGOOD latched low VR_ON or

VDD

TABLE 3. FAULT PROTECTION SUMMARY OF

ISL6263C (Continued)

FAULT TYPE

FAULT

DURATION

PRIOR TO

PROTECTION

ACTIONS

FAULT

RESET

Severe

Overvoltage

(+1.55V)

between VO pin

and VSS pin

Immediately

UGATE, and

Cycle

PGOOD latched low, VDD only

LGATE toggles ON

when VO > 1.55V

OFF when

VO < 0.77V

until fault reset

Undervoltage

(-300mV)

between VO pin

and SOFT pin

1ms

LGATE, UGATE, and Cycle

PGOOD latched low VR_ON or

VDD

Gate-Driver Outputs LGATE and UGATE

The ISL6263C has internal high-side and low-side

N-Channel MOSFET gate-drivers. The LGATE driver is

optimized for low duty-cycle applications where the low-side

MOSFET conduction losses are dominant. The LGATE

pull-down resistance is very low in order to clamp the

gate-source voltage of the MOSFET below the VGS(th) at

turn-off. The current transient through the low-side gate at

turn-off can be considerable due to the characteristic large

switching charge of a low rDS(ON) MOSFET.

PWM

LGATE

UGATE

t PDRU

t PDRL

FIGURE 6. GATE DRIVER TIMING DIAGRAM

Adaptive shoot-through protection prevents the gate-driver

outputs from going high until the opposite gate-driver output

has fallen below approximately 1V. The UGATE turn-on

propagation delay tPDRU and LGATE turn-on propagation

delay tPDRL are found in the âElectrical Specificationsâ table

on page 6. The power for the LGATE gate-driver is sourced

directly from the PVCC pin. The power for the UGATE

gate-driver is sourced from a boot-strap capacitor connected

across the BOOT and PHASE pins. The boot capacitor is

charged from PVCC through an internal boot-strap diode

each time the low-side MOSFET turns on, pulling the

PHASE pin low.

FN6745.1

July 8, 2010

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