HD-6409 Datasheet, PDF (12/12 Pages) Intersil Corporation – CMOS Manchester Encoder-Decoder

Timing Waveforms (Continued)
HD-6409
UDI
ECLK
BZO
SDO
NVM
MANCHESTER ‘1’
MANCHESTER ‘0’
MANCHESTER ‘0’
MANCHESTER ‘1’
t_R2
t_R2
t_R1
MANCHESTER ‘1’
t_R3
MANCHESTER ‘0’
MANCHESTER ‘0’
t_R3
FIGURE 17. REPEATER TIMING
Test Load Circuit
DUT
C_L
(NOTE)
NOTE: INCLUDES STRAY AND JIG
CAPACITANCE
FIGURE 18. TEST LOAD CIRCUIT
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