HA2556 Datasheet, PDF (12/20 Pages) Intersil Corporation – Wideband Four Quadrant Analog Multiplier (Voltage Output)

HA2556
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Applications Information
Operation at Reduced Supply Voltages
The HA-2556 will operate over a range of supply voltages,
±5V to ±15V. Use of supply voltages below ±12V will reduce
input and output voltage ranges. See “Typical Performance
Curves” for more information.
Offset Adjustment
X and Y channel offset voltages may be nulled by using a
20K potentiometer between the V_YIO or V_XIO adjust pin A
and B and connecting the wiper to V-. Reducing the channel
offset voltage will reduce AC feedthrough and improve the
multiplication error. Output offset voltage can also be nulled
by connecting V_Z- to the wiper of a potentiometer which is
tied between V+ and V-.
Capacitive Drive Capability
When driving capacitive loads >20pF a 50Ω resistor should
be connected between V_OUT and V_Z+, using V_Z+ as the out-
put (see Figure 1). This will prevent the multiplier from going
unstable and reduce gain peaking at high frequencies. The
50Ω resistor will dampen the resonance formed with the
capacitive load and the inductance of the output at pin 8.
Gain accuracy will be maintained because the resistor is
inside the feedback loop.
Theory of Operation
The HA-2556 creates an output voltage that is the product of
the X and Y input voltages divided by a constant scale factor
of 5V. The resulting output has the correct polarity in each of
the four quadrants defined by the combinations of positive
and negative X and Y inputs. The Z stage provides the
means for negative feedback (in the multiplier configuration)
and an input for summation into the output. This results in
the following equation, where X, Y and Z are high imped-
ance differential inputs.
NC
NC
NC
V_Y+
-15V
1
16
REF
2
15
3
14
4
5₊
-
6
7
8
+_- ¹³
12
11
+
Σ
-
+^-
10
9
NC
NC
NC
V_X+
+15 V
V_Z -
V_Z +
50Ω
1K
V_OUT
20pF
To accomplish this the differential input voltages are first con-
verted into differential currents by the X and Y input transcon-
ductance stages. The currents are then scaled by a constant
reference and combined in the multiplier core. The multiplier
core is a basic Gilbert Cell that produces a differential output
current proportional to the product of X and Y input signal cur-
rents. This current becomes the output for the HA-2557.
The HA-2556 takes the output current of the core and feeds
it to a transimpedance amplifier, that converts the current to
a voltage. In the multiplier configuration, negative feedback
is provided with the Z transconductance amplifier by con-
necting V_OUT to the Z input. The Z stage converts V_OUT to a
current which is subtracted from the multiplier core before
being applied to the high gain transimpedance amp. The Z
stage, by virtue of it’s similarity to the X and Y stages, also
cancels second order errors introduced by the dependence
of V_BE on collector current in the X and Y stages.
The purpose of the reference circuit is to provide a stable
current, used in setting the scale factor to 5V. This is
achieved with a bandgap reference circuit to produce a tem-
perature stable voltage of 1.2V which is forced across a NiCr
resistor. Slight adjustments to scale factor may be possible
by overriding the internal reference with the V_REF pin. The
scale factor is used to maintain the output of the multiplier
within the normal operating range of ±5V when full scale
inputs are applied.
The Balance Concept
The open loop transfer equation for the HA-2556 is:
VOUT = A
_----^V_----X_----+_{-----–-----}^V_----X_-----_--_-----5^×_-----_---^V_----Y_----+_{-----–-----}^V_----Y_-----_--_--
–


VZ+
–
VZ-_
where;
A = Output Amplifier Open Loop Gain
V_X, V_Y, V_Z = Differential Input Voltages
5V = Fixed Scale Factor
An understanding of the transfer function can be gained by
assuming that the open loop gain, A, of the output amplifier
is infinite. With this assumption, any value of V_OUT can be
generated with an infinitesimally small value for the terms
within the brackets. Therefore we can write the equation:
0
=
-⁽---^V---^X---⁺----–-----^V---^X---^---⁾----^×------⁽---^V---^Y---⁺----–-----^V---^Y---^---⁾- –
5
( VZ+ – VZ-)
which simplifies to:
( VX+ – VX-) × ( VY+ – VY-) = 5 ( VZ+ – VZ-)
FIGURE 1. DRIVING CAPACITIVE LOAD
VOUT = -^X----_5x---^Y-- – Z
This form of the transfer equation provides a useful tool to
analyze multiplier application circuits and will be called the
Balance Concept.
Spec Number 511063-883
8-18