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X9448 Datasheet, PDF (11/19 Pages) Xicor Inc. – Mixed Signal with 2-Wire Interface
X9448
CAPACITANCE
Symbol
CI/O
CIN
CL, CH, CW
Test
Input/output capacitance (SDA)
Input capacitance (A0, A1, A2, A3, and SCL)
Potentiometer capacitance
Typical
8
6
10/10/25
Power-Up Timing and Sequence
Power-up sequence(1): (1) VCC (2) V+ and V-
Power-down sequence: no limitation
{V+ ≤ VCC at all times}
Unit
pF
pF
pF
Test Conditions
VI/O = 0V
VIN = 0V
A.C. TEST CONDITIONS
Input pulse levels
Input rise and fall times
VCC x 0.1 to VCC x 0.9
10ns
Input and output timing level VCC x 0.5
Note: (1) Applicable to recall and power consumption applica-
tions
EQUIVALENT A.C. LOAD CIRCUIT
SD Output
5V
1533Ω
100pF
2.7V
100pF
TIMING DIAGRAMS
START and STOP Timing
(START)
SCL
tSU:STA
SDA
tR
tHD:STA
tR
Input Timing
tCYC
SCL
SDA
tSU:DAT
tF
tSU:STO
tF
(STOP)
tHIGH
tLOW
tHD:DAT
tBUF
11
FN8201.0
April 18, 2005