ICL7134 Datasheet, PDF (11/16 Pages) Intersil Corporation – 14-Bit Multiplying Microprocessor-Compatible D/A Converter

ICL7134
negative excursions which could damage the device, and is
only necessary with certain high spped amplifiers. For
applications where the output reference ground point is
established somewhere other than at the DAC, the circuit of
Figure 9 can be used. Here, op-amp A₂ removes the slight
error due to IR voltage drop between the internal Analog
GrouND node and the external ground connection. For
13-bit or lower accuracy, omit A₂ and connect AGND_F and
AGND_S directly to ground through as low a resistance as
possible.
TABLE 2. CODE TABLE - UNIPOLAR BINARY OPERATION
DIGITAL INPUT
11111111111111
10000000000001
10000000000000
01111111111111
00000000000001
00000000000000
ANALOG OUTPUT
-V_REF (1 - 1/2¹⁴)
-V_REF (1/2 + 1/2¹⁴)
-V_REF/2
-V_REF (1/2 - 1/2¹⁴)
-V_REF (1/2¹⁴)
0
Zero Offset Adjustment
1. Connect all data inputs and WR, CS, A₀ and A₁ to
DGND.
2. Adjust offset zero-adjust trim-pot of the operational ampli-
fier A₂, if used, for a maximum of 0V ±50µV at AGND_S.
3. Adjust the offset zero-adjust trim-pot of the output
op-amp, A₁, for a maximum of 0V ±50µV at V_OUT .
FIGURE 8. UNIPOLAR BINARY, TWO-QUADRANT
MULTIPLYING CIRCUIT
Gain Adjustment (Optional)
1. Connect all data inputs to V+, connect WR, CS, A₀ and A₁
to DGND.
2. Monitor V_OUT for a -V_REF (1 - 1/2¹⁴) reading.
3. To decrease V_OUT, connect a series resistor of 5Ω or less
between the reference voltage and the V_RFM and V_RFL
terminals (pins 20 and 18).
4. To increase V_OUT, connect a series resistor of 5Ω or less
between A₁ output and the R_FB terminal (pin 21).
Bipolar (2’s Complement) Operation (ICL7134B)
The circuit configuration for bipolar mode operation
(ICL7134B) is shown in Figure 10. Using 2’s complement
digital input codes and positive and negative reference
voltage values, four-quadrant multiplication is obtained. The
“digital input code/analog output value” table for bipolar
mode is given in Table 3. Amplifier A₃, together with internal
resistors R_INV1 and R_INV2 , forms a simple voltage inverter
circuit. The MSB ladder leg sees a reference input of
approximately -V_REF, so the MSB’s weight is reversed from
the polarity of the other bits. In addition, the ICL7134B’s
feedback resistance is switched to 2R under PROM control,
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used if necessary.
TABLE 3. CODE TABLE - BIPOLAR (2’S COMPLEMENT)
OPERATION
FIGURE 9. UNIPOLAR BINARY OPERATION WITH FORCED
GROUND
DIGITIAL INPUT
01111111111111
00000000000001
00000000000000
11111111111111
10000000000001
10000000000000
ANALOG OUTPUT
-V_REF (1 - 1/2¹³)
-V_REF (1/2¹³)
0
V_REF (1/2¹³)
V_REF (1 - 1/2¹³)
V_REF
11