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X9409_15 Datasheet, PDF (10/19 Pages) Intersil Corporation – Low Noise/Low Power/2-Wire Bus Quad Digita Controlled Potentiometers
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INSTRUCTION
I3
Read Wiper Counter
1
Register
Write Wiper Counter
1
Register
Read Data Register
1
Write Data Register
1
XFR Data Register to
1
Wiper Counter Register
XFR Wiper Counter
1
Register to Data Register
Global XFR Data Registers 0
to Wiper Counter
Registers
Global XFR Wiper Counter 1
Registers to Data Register
Increment/Decrement
0
Wiper Counter Register
NOTE:
13. 1/0 = data is one or zero
X9409
TABLE 1. INSTRUCTION SET
INSTRUCTION SET
I2 I1 I0 R1 R0 P1 P0
OPERATION
0 0 1 0 0 P1 P0 Read the contents of the Wiper Counter Register pointed to by
P1 - P0
0 1 0 0 0 P1 P0 Write new value to the Wiper Counter Register pointed to by P1 -
P0
0 1 1 R1 R0 P1 P0 Read the contents of the Data Register pointed to by P1 - P0 and
R1 - R0
1 0 0 R1 R0 P1 P0 Write new value to the Data Register pointed to by P1 - P0 and
R1 - R0
1 0 1 R1 R0 P1 P0 Transfer the contents of the Data Register pointed to by P1 - P0
and R1 - R0 to its associated Wiper Counter Register
1 1 0 R1 R0 P1 P0 Transfer the contents of the Wiper Counter Register pointed to
by P1 - P0 to the Data Register pointed to by R1 - R0
0 0 1 R1 R0 0
0 Transfer the contents of the Data Registers pointed to by
R1 - R0 of all four pots to their respective Wiper Counter
Registers
0 0 0 R1 R0 0
0 Transfer the contents of both Wiper Counter Registers to their
respective Data Registers pointed to by R1 - R0 of all four pots
0 1 0 0 0 P1 P0 Enable Increment/decrement of the WCR Latch pointed to by
P1 - P0
SCL
SDA
S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 R1 R0 P1 P0 A S
T
C
CT
A
K
KO
R
P
T
FIGURE 7. 2-BYTE INSTRUCTION SEQUENCE
SCL
SDA
S0
T
A
R
T
1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 R1 R0 P1 P0 A 0
C
C
K
K
FIGURE 8. 10-BYTE INSTRUCTION SEQUENCE
0 D5 D4 D3 D2 D1 D0 A S
CT
KO
P
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FN8192.6
September 3, 2015
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