X60250 Datasheet, PDF (10/16 Pages) Intersil Corporation – Micro Power Programmable Voltage Reference

X60250
X60250 BUS INTERFACE INFORMATION
Slave Address, Address Byte, and Data Byte
The byte communication format for the serial bus is
shown in Figure 1 on the previous page. The first byte,
BYTE 0, defines the device identifier, 0101 in the upper
half; and the device slave address in the low half of the
byte. The slave address is set to 0. The next byte,
BYTE 1, is the Address Byte. The Address Byte
identifies a unique address for the Status or Control
Registers as shown in the Register Descriptions table.
The following byte, Byte 2, is the byte used for READ
and WRITE operations.
Start Condition
All commands are preceded by the start condition, which
is a HIGH to LOW transition of SDA when SCL is HIGH.
The device continuously monitors the SDA and SCL
lines for the start condition and will not respond to any
command until this condition has been met. On power-
up, the SCL pin must be brought LOW prior to the
START condition. See Figure 3.
Stop Condition
All communications must be terminated by a stop
condition, which is a LOW to HIGH transition of SDA
when SCL is HIGH followed by a HIGH to LOW
transistion on SCL. After going LOW, SCL can stay LOW
or return to HIGH. See Figure 3.
Acknowledge
Acknowledge is a software convention used to indicate
successful data transfer. The transmitting device, either
master or slave, will release the bus after transmitting
eight bits. During the ninth clock cycle, the receiver will
pull the SDA line LOW to acknowledge that it received
the eight bits of data. Refer to Figure 4. The device will
respond with an acknowledge after recognition of a start
condition and if the correct Device Identifier and Select
bits are contained in the Slave Address Byte. If a write
operation is selected, the device will respond with an
acknowledge after the receipt of each subsequent eight
bit word. The device will acknowledge all incoming data
and address bytes, except for:
– The Slave Address Byte when the Device Identifier
and/or Select bits are incorrect
– The 2nd Data Byte of a Status Register Write Oper-
ation (only 1 data byte is allowed)
Pin Descriptions
V_REFOUT
Reference voltage output. The 1.25V bandgap
reference output (V_REF) is available at this pin for
application to other circuits. Maximum output current is
400µA. The V_REFOUT pin also connects to the Rh
terminal of the 256-tap DCP.
V_OUT
DCP Wiper Output. This pin functions as the wiper of the
DCP, and can be used as a variable voltage source for
voltages between GND and V_REF. Since it is connected
to the DCP resistor, any loads on this pin must be high
impedance for best performance.
R₁
Auxiliary Resistor Input. The R₁ pin is connected to one
end of a 100kΩ resistor (R₁) which closely matches the
DCP resistance. The other end of R₁ is tied to the R_REFL
terminal of the DCP. When R₁ is grounded and V_REFL is
left open, the output voltage range of V_OUT will be from
V_REF/2 to V_REF, and the effective resolution (mV/step) of
the Reference control is doubled. R₁ should be left open
if not used.
GND
This pin is common for the V_REF output and for control
signal inputs.
SDA
Serial Data Input/Output. Bidirectional pin used for serial
data transfer. As an output, it is open drain and may be
wire-ored with any number of open drain or open
collector outputs. A pullup resistor is required and the
value is dependent on the speed of the serial data bus
and the number of outputs tied together.
SCL
Serial Clock Input. Accepts a clock signal for clocking
serial data into and out of the device.
V_REFL
DCP and Auxiliary Resistor Input. This pin is connected
to one end of the 256-tap DCP, and also to one end of
the 100kΩ auxiliary resistor. When connected to ground,
V_OUT range will be from 0V to V_REF. When left open
and R₁ is connected to ground, the voltage at this pin will
be from V_REF/2 to V_REF.
10
FN8146.1
September 14, 2005