ISL6752 Datasheet, PDF (10/16 Pages) Intersil Corporation – ZVS Full-Bridge Current-Mode PWM with Adjustable Synchronous Rectifier Control

ISL6752
The values of R and C should be selected to control the rate
of rise of VERR to the desired soft-start duration. The
soft-start duration may be calculated from Equation 6.
t
=
–RC
⋅
⎛
ln _⎜⎜ 1
⎝
–
V^-----R^---V--E^---S-F^{---S--+---–--0}----^V----^.--⁰--^b------_β⁰--^e----¹--------^R------_{⎠⎟⎟⎞}
S
(EQ. 6)
where V_SS is the soft-start clamp voltage, V_be is the base
emitter voltage drop of the transistor, and β is the DC gain of
the transistor. If β is sufficiently large, that term may be
ignored. The Schottky diode discharges the soft-start
capacitor so that the circuit may be reset quickly.
Gate Drive
The ISL6752 outputs are capable of sourcing and sinking
10mA (at rated VOH, VOL) and are intended to be used in
conjunction with integrated FET drivers or discrete bipolar
totem pole drivers. The typical ON-resistance of the outputs
is 50Ω.
Overcurrent Operation
The cycle-by-cycle peak current control results in
pulse-by-pulse duty cycle reduction when the current
feedback signal exceeds 1.0V. When the peak current
exceeds the threshold, the active output pulse is
immediately terminated. This results in a well controlled
decrease in output voltage as the load current increases
beyond the current limit threshold. The ISL6752 will operate
continuously in an overcurrent condition.
The propagation delay from CS exceeding the current limit
threshold to the termination of the output pulse is increased
by the leading edge blanking (LEB) interval. The effective
delay is the sum of the two delays and is nominally 105ns.
Slope Compensation
Peak current-mode control requires slope compensation to
improve noise immunity, particularly at lighter loads, and to
prevent current loop instability, particularly for duty cycles
greater than 50%. Slope compensation may be
accomplished by summing an external ramp with the current
feedback signal or by subtracting the external ramp from the
voltage feedback error signal. Adding the external ramp to
the current feedback signal is the more popular method.
From the small signal current-mode model [1] it can be
shown that the naturally-sampled modulator gain, Fm,
without slope compensation, is expressed in Equation 7:
Fm
=
--------¹---------
S_nt_SW
(EQ. 7)
where S_n is the slope of the sawtooth signal and t_SW is the
duration of the half-cycle. When an external ramp is added,
the modulator gain becomes Equation 8:
Fm
=
-₍--_S----_n-----+----_S-¹----_e---₎---_t-_S----_W----
=
------------¹--------------
m_cS_nt_SW
(EQ. 8)
where S_e is slope of the external ramp and:
m_c
=
1
+
-^S----^e-
S_n
(EQ. 9)
The criteria for determining the correct amount of external
ramp can be determined by appropriately setting the
damping factor of the double-pole located at half the
oscillator frequency. The double-pole will be critically
damped if the Q-factor is set to 1, and over-damped for
Q > 1, and under-damped for Q < 1. An under-damped
condition can result in current loop instability.
Q
=
------------------------¹-------------------------
π(m_c(1 – D) – 0.5)
(EQ. 10)
where D is the percent of on-time during a half cycle. Setting
Q = 1 and solving for S_e yields Equation 11:
S_e
=
S_n
⎛⎛
⎝⎝
1_--
π
+
0.5_⎠⎞
------¹-------
1–D
–
1_⎠⎞
(EQ. 11)
Since S_n and S_e are the on-time slopes of the current ramp
and the external ramp, respectively, they can be multiplied
by t_ON to obtain the voltage change that occurs during t_ON.
V_e
=
V_n
⎛⎛
⎝⎝
1_-π-
+
0.5_⎠⎞
------¹-------
1–D
–
1_⎠⎞
(EQ. 12)
where V_n is the change in the current feedback signal during
the on-time and V_e is the voltage that must be added by the
external ramp.
V_n can be solved for in terms of input voltage, current
transducer components, and output inductance yielding
Equation 13:
V_e
=
t_{--S----W-------}⋅_---V_----O------⋅_---R_----C----S--
N_CT ⋅ L_O
⋅
-^N----^S--
N_P
⎛
⎝
1_π--
+
D
–
0.5_⎠⎞
V
(EQ. 13)
where R_CS is the current sense burden resistor, N_CT is the
current transformer turns ratio, L_O is the output inductance,
V_O is the output voltage, and N_S and N_P are the secondary
and primary turns, respectively.
The inductor current, when reflected through the isolation
transformer and the current sense transformer to obtain the
current feedback signal at the sense resistor yields
Equation 14:
V_CS
=
N_-----S-----⋅_---R_{-----C----S--}
N_P ⋅ N_CT
⎛
⎝⎜ ^{I O}
+
D_------⋅_---t_--S----W----
2L_O
⎛
⎜
⎝
V_I
N
⋅
N_-----S--
N_P
–
⎞
V_{O⎠⎟}
⎞
⎟
⎠
V (EQ. 14)
where V_CS is the voltage across the current sense resistor
and I_O is the output current at current limit.
10
FN9181.3
October 31, 2008