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ISL6445 Datasheet, PDF (10/15 Pages) Intersil Corporation – 1.4MHz Dual, 180 Out-of-Phase, Step-Down PWM Controller
ISL6445
Input Voltage Range
The ISL6445 is designed to operate from input supplies
ranging from 4.5V to 24V. However, the input voltage range
can be effectively limited by the available maximum duty
cycle (DMAX = 71%).
VIN(min)
=
⎛
⎝
V-----O----U--0--T-.--7--+--1---V----d----1-⎠⎞
+ Vd2 – Vd1
(EQ. 3)
where,
Vd1 = Sum of the parasitic voltage drops in the inductor
discharge path, including the lower FET, inductor and PC
board.
Vd2 = Sum of the voltage drops in the charging path,
including the upper FET, inductor and PC board resistances.
The maximum input voltage and minimum output voltage is
limited by the minimum on-time (tON(min)).
VIN(max) ≤ -t-O-----N----(--m-----i-V-n---)O---×-U----1-T--.--4----M-----H-----z-
(EQ. 4)
where, tON(min) = 30ns
Gate Control Logic
The gate control logic translates generated PWM signals
into gate drive signals providing amplification, level shifting
and shoot-through protection. The gate drivers have some
circuitry that helps optimize the ICs performance over a wide
range of operational conditions. As MOSFET switching
times can vary dramatically from type to type and with input
voltage, the gate control logic provides adaptive dead time
by monitoring real gate waveforms of both the upper and the
lower MOSFETs. Shoot-through control logic provides a
20ns deadtime to ensure that both the upper and lower
MOSFETs will not turn on simultaneously and cause a
shoot-through condition.
Gate Drivers
The low-side gate driver is supplied from VCC5 and provides
a peak sink/source current of 400mA. The high-side gate
driver is also capable of 400mA current. Gate-drive voltages
for the upper N-Channel MOSFET are generated by the
flying capacitor boot circuit. A boot capacitor connected from
the BOOT pin to the PHASE node provides power to the
high side MOSFET driver. To limit the peak current in the IC,
an external resistor may be placed between the UGATE pin
and the gate of the external MOSFET. This small series
resistor also damps any oscillations caused by the resonant
tank of the parasitic inductances in the traces of the board
and the FET’s gate to drain capacitance.
VIN
VCC5
BOOT
UGATE
PHASE
ISL6445
FIGURE 15. GATE DRIVER
At start-up the low-side MOSFET turns on and forces
PHASE to ground in order to charge the BOOT capacitor to
5V. After the low-side MOSFET turns off, the high-side
MOSFET is turned on by closing an internal switch between
BOOT and UGATE. This provides the necessary
gate-to-source voltage to turn on the upper MOSFET, an
action that boosts the 5V gate drive signal above VIN. The
current required to drive the upper MOSFET is drawn from
the internal 5V regulator.
Protection Circuits
The converter output is monitored and protected against
overload, short circuit and undervoltage conditions. A
sustained overload on the output sets the PGOOD low and
initiates hiccup mode.
Both PWM controllers use the lower MOSFET’s
ON-resistance, rDS(ON), to monitor the current in the
converter. The sensed voltage drop is compared with a
threshold set by a resistor connected from the OCSETx pin
to ground.
ROCSET
=
---------(---7---)---(--R-----C----S----)---------
(IOC)(rDS(ON))
(EQ. 5)
where, IOC is the desired overcurrent protection threshold,
and RCS is a value of the current sense resistor connected
to the ISENx pin. If the lower MOSFET current exceeds the
overcurrent threshold, an overcurrent condition is detected.
If overcurrent is detected for 2 consecutive clock cycles then
the IC enters a hiccup mode by turning off the gate drivers
and entering into soft-start. The IC will cycle 2x through
soft-start before trying to restart. The IC will continue to cycle
through soft-start until the overcurrent condition is removed.
Because of the nature of this current sensing technique, and
to accommodate a wide range of rDS(ON) variations, the
value of the overcurrent threshold should represent an
overload current about 150% to 180% of the maximum
operating current. If more accurate current protection is
desired place a current sense resistor in series with the
lower MOSFET source.
10
FN9230.1
June 3, 2008