ISL54062_0911 Datasheet, PDF (10/16 Pages) Intersil Corporation – Negative Signal Swing, Sub-ohm, Dual SPDT

ISL54062
The minimum recommended supply voltage is 1.8V. It is
important to note that the input signal range, switching times,
and ON-resistance degrade at lower supply voltages. Refer
to the “Electrical Specifications” tables, beginning on page 3,
and “Typical Performance Curves”, beginning on page 11,
for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to V+ and
GND signals levels to drive the analog switch gate terminals.
A high frequency decoupling capacitor placed as close to the
V+ and GND pin as possible is recommended for proper
operation of the switch. A value of 0.1µF is highly
recommended.
Negative Signal Swing Capability
The ISL54062 contains circuitry that allows the analog
switch signal to swing below ground. The device has an
analog signal range of 6.5V below V+ up to the V+ rail (see
Figure 16) while maintaining low r_ON performance. For
example, if V+ = 5V, then the analog input signal range is
from -1.5V to +5V. If V+ = 2.7V then the range is from -3.8V
to +2.7V.
Click and Pop Operation
The ISL54062 contains circuitry that prevents audible click
and pop noises that may occur when audio sources are
powered on or off. Single supply audio sources are biased at
a DC offset that can generate transients during power on/off.
A DC blocking capacitor is needed to remove the DC bias at
the speaker load. For 32Ω headphones, a 220µF capacitor is
typically used to preserve the audio bandwidth. The power
on/off transients are AC coupled by the 220µF capacitor to
the speaker load causing a click and pop noise.
The ISL54062 has shunt switches on the NO and NC pins to
eliminate click and pop transients (see Figure 10). These
switches are driven complimentary to the main switch. When
NC is connected to COM, the shunt switch is active on the
NO pin (and vice versa). The shunt switches connect an
impedance (140Ω typical, see Figure 24) from the NO/NC
pin to ground to discharge any transients that may appear on
the NO or NC pins.
When a DC bias becomes active at the source, the NO and
NC terminals will also have a DC offset due to capacitor
dv/dt principle. The DC offset will be discharged through the
shunt impedance on the NO and NC terminals instead of the
speaker, eliminating click and pop noise.
*Under high impedance loads such as the input impedance
of pre-amplifiers (20kΩ), the COM terminal voltage may rise
due to small leakage currents charging the COM
capacitance. This is not seen when low impedance loads
such as headphones (32Ω) are used because the small
leakage currents does not result in significant potential drop
across the load. If the user desires to reduce the voltage
build up on the COM pin, a 1kΩ resistor to ground may be
placed on the COM pin. This impedance is small enough to
reduce the voltage build up significantly while not increasing
the power dissipation dramatically. Current consumption
considerations will need to be taken for driving a smaller
load impedance under this scenario.
AUDIO
SOURCE A
220µF
NO
V+
C
R_SH
NC
220µF
AUDIO
SOURCE B
R_SH
COM
R_L
32Ω
IN
GND
ISL54062
FIGURE 10. CLICK AND POP OPERATION
Click and Pop Elimination with INx Pin
Audio click and pop elimination can be driven with the Input
Select (INx) pin. When INx = 0, the NOx terminals are
connected to the shunt impedance. When INx = 1, the NCx
terminals are connected to the shunt impedance. In this
situation, only one of the source transient voltages will be
shunted to ground, depending on the Input Select state. The
Input Select pin should be driven 200ms after any source
transients occurs to prevent audible transients at the
speaker load.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.45V V_OLMAX
and 1.35V V_OHMIN) over a supply range of 1.8V to 3.3V
(see Figure 18). At 3.3V the V_IL level is 0.5V maximum. This
is still below the 1.8V CMOS guaranteed low output
maximum level of 0.45V, but noise margin is reduced to
approximately 50mV. At 3.3V the V_IH level is 1.4V minimum.
While this is above the 1.8V CMOS guaranteed high output
minimum of 1.35V, under most operating conditions the
switch will recognize this as a valid logic high.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation. The ISL54062 has been
designed to minimize the supply current whenever the digital
input voltage is not driven to the supply rails (0V to V+). For
example, driving the device with 2.85V logic high while
operating with a 4.2V supply the device draws only 1µA of
current.
10
FN6581.1
November 3, 2009