HCTS30MS Datasheet, PDF (1/10 Pages) Intersil Corporation – Radiation Hardened 8-Input NAND Gate

HCTS30MS
August 1995
Radiation Hardened
8-Input NAND Gate
Features
Pinouts
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm²/mg
• Single Event Upset (SEU) Immunity < 2 x 10^-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 10¹² RAD (Si)/s
• Dose Rate Upset >10¹⁰ RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55^oC to +125^oC
• Significant Power Reduction Compared to LSTTL ICs
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14
TOP VIEW
A1
B2
C3
D4
E5
F6
GND 7
14 VCC
13 NC
12 H
11 G
10 NC
9 NC
8Y
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCTS30MS is a Radiation Hardened 8-Input
NAND Gate. A high on all input forces the output to a low
state.
The HCTS30MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14
TOP VIEW
A
B
C
D
E
F
GND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
NC
H
G
NC
NC
Y
Ordering Information
PART NUMBER
HCTS30DMSR
HCTS30KMSR
HCTS30D/Sample
HCTS30K/Sample
HCTS30HMSR
TEMPERATURE RANGE
-55^oC to +125^oC
-55^oC to +125^oC
+25^oC
+25^oC
+25^oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
14 Lead SBDIP
14 Lead Ceramic Flatpack
14 Lead SBDIP
14 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
440
Spec Number 518639
File Number 3056.1