DG401_06 Datasheet, PDF (1/12 Pages) Intersil Corporation – Monolithic CMOS Analog Switches

®
Data Sheet
DG401, DG403
November 20, 2006
FN3284.11
Monolithic CMOS Analog Switches
The DG401 and DG403 monolithic CMOS analog switches
have TTL and CMOS compatible digital inputs.
These switches feature low analog ON resistance (<45Ω)
and fast switch time (t_ON<150ns). Low charge injection
simplifies sample and hold applications.
The improvements in the DG401, DG403 series are made
possible by using a high voltage silicon-gate process. An
epitaxial layer prevents the latch-up associated with older
CMOS technologies. The 44V maximum voltage range
permits controlling 30V_P-P signals. Power supplies may be
single-ended from +5V to +34V, or split from ±5V to ±17V.
The analog switches are bilateral, equally matched for AC or
bidirectional signals. The ON resistance variation with analog
signals is quite low over a ±15V analog input range. The three
different devices provide the equivalent of two SPST (DG401)
or two SPDT (DG403) relay switch contacts with CMOS or
TTL level activation. The pinout is similar, permitting a
standard layout to be used, choosing the switch function as
needed.
Pinouts
DG401
(16 LD SOIC, TSSOP)
TOP VIEW
D₁ 1
NC 2
NC 3
NC 4
NC 5
NC 6
NC 7
D₂ 8
16 S₁
15 IN₁
14 _V-
13 GND
12 V_L
11 V+
10 IN₂
9 S₂
DG403
(16 LD SOIC, TSSOP)
TOP VIEW
D₁ 1
NC 2
D₃ 3
S₃ 4
S₄ 5
D₄ 6
NC 7
D₂ 8
16 S₁
15 IN₁
14 V-
13 GND
12 V_L
11 V+
10 IN₂
9 S₂
NOTE: (NC) No Connection.
Features
• ON Resistance (Max) . . . . . . . . . . . . . . . . . . . . . . . . . 45Ω
• Low Power Consumption (P_D) . . . . . . . . . . . . . . . . . . .<35μW
• Fast Switching Action
- t_ON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns
- t_OFF (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ns
• Low Charge Injection
• DG401 Dual SPST; Same Pinout as HI-5041
• DG403 Dual SPDT; DG190, IH5043, IH5151, HI-5051
• TTL, CMOS Compatible
• Single or Split Supply Operation
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Audio Switching
• Battery Operated Systems
• Data Acquisition
• Hi-Rel Systems
• Sample and Hold Circuits
• Communication Systems
• Automatic Test Equipment
Ordering Information
PART
PART
TEMP.
PKG.
NUMBER* MARKING RANGE (°C) PACKAGE DWG. #
DG401DY* DG401DY -40 to +85 16 Ld SOIC M16.15
DG401DYZ* DG401DYZ -40 to +85 16 Ld SOIC M16.15
(Note)
(Pb-free)
DG401DVZ* DG401 DVZ -40 to +85 16 Ld TSSOP M16.173
(Note)
(Pb-free)
DG403DY* DG403DY -40 to +85 16 Ld SOIC M16.15
DG403DYZ* DG403DYZ -40 to +85 16 Ld SOIC M16.15
(Note)
(Pb-free)
DG403DVZ* DG403 DVZ -40 to +85 16 Ld TSSOP M16.173
(Note)
(Pb-free)
*Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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