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DG201A_01 Datasheet, PDF (1/7 Pages) Intersil Corporation – Quad SPST, CMOS Analog Switches
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DG201A, DG202
May 2001
File Number 3117.3
Quad SPST, CMOS Analog Switches
itle
G20
,
202
b-
t
uad
ST,
OS
a-
The DG201A and DG202 quad SPST analog switches are
designed using Intersil’s 44V CMOS process. These
bidirectional switches are latch-proof and feature break-
before-make switching. Designed to block signals up to
30VP-P in the OFF state, the DG201A and DG202 offer the
advantages of low ON resistance (≤175Ω), wide input signal
range (±15V) and provide both TTL and CMOS compatibility.
The DG201A and DG202 are specification and pinout
compatible with the industry standard devices.
Part Number Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
PKG.
NO.
itch
utho
)
ey-
rds
ter-
DG201AAK
DG201ABK
DG201ACJ
DG201ACY
DG202AK
DG202CJ
-55 to 125 16 Ld CERDIP
-25 to 85 16 Ld CERDIP
0 to 70 16 Ld PDIP
0 to 70 16 Ld SOIC
-55 to 125 16 Ld CERDIP
0 to 70 16 Ld PDIP
F16.3
F16.3
E16.3
M16.3
F16.3
E16.3
rpo- Pinout
ion,
i-
n-
ctor,
itch
OS
PST,
DT,
ST,
DT,
eo,
ET,
alog
itch,
an-
l)
re-
DG201A, DG202
(CERDIP, PDIP, SOIC)
TOP VIEW
IN1 1
D1 2
S1 3
V- 4
GND 5
S4 6
D4 7
IN4 8
16 IN2
15 D2
14 S2
13
V+ (SUB-
S- TRATE)
12 NC
11 S3
10 D3
9 IN3
Features
• Input Signal Range. . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
• Low rDS(ON) (Max). . . . . . . . . . . . . . . . . . . . . . . . . . 175Ω
• TTL, CMOS Compatible
• Latch-Up Proof
• True Second Source
• Maximum Supply Ratings . . . . . . . . . . . . . . . . . . . . . 44V
• Logic Inputs Accept Negative Voltages
Functional Block Diagrams
DG201A
S1
IN1
D1
S2
IN2
D2
S3
IN3
D3
S4
IN4
D4
DG202
S1
IN1
D1
S2
IN2
D2
S3
IN3
D3
S4
IN4
D4
SWITCHES SHOWN FOR LOGIC “1” INPUT
TRUTH TABLE
LOGIC
DG201A
DG202
0
ON
OFF
1
OFF
ON
Logic “0” ≤0.8V, Logic “1” ≥ 2.4V
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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