CD4527BMS Datasheet, PDF (1/11 Pages) Intersil Corporation – CMOS BCD Rate Multiplier

CD4527BMS
December 1992
CMOS BCD Rate Multiplier
Features
Description
• High Voltage Type (20V Rating)
• Cascadable in Multiples of 4-Bits
• Set to “9” Input and “9” Detect Output
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25^oC
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Standardized Symmetrical Output Characteristics
CD4527BMS is a low power 4-bit digital rate multiplier that
provides an output pulse rate which is the clock input pulse
rate multiplied by 1/10 times the BCD input. For example,
when the BCD input is 8, there will be 8 output pulses for
every 10 input pulses. This device may be used to perform
arithmetic operations (add, subtract, divide, raise to a
power), solve algebraic and differential equations, generate
natural logarithms and trigonometric functions, A/D and D/A
conversion, and frequency division.
For fractional multipliers with more than one digit,
CD4527BMS devices may be cascaded in two different
modes: the Add mode and the Multiply mode (see Figures 9
and 11). In the Add mode,
Output Rate =
(Clock Rate) [0.1BCD1 + 0.01BCD2 + 0.001BCD3 + . . .]
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
In the Multiply mode, the fraction programmed into the first
rate multiplier is multiplied by the fraction programmed into
the second one,
Applications
• Numerical Control
• Instrumentation
• Digital Filtering
• Frequency Synthesis
9
4
36
e.g.
x
=
or 36 output
10
10
100
pulses for every 100 clock input pulses.
The CD4527BMS is supplied in these 16-lead outline packages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
H4X
H1F
H6W
Pinout
CD4527BMS
TOP VIEW
“9” OUT 1
C2
D3
SET TO “9” 4
OUT 5
OUT 6
INHIBIT OUT (CARRY) 7
VSS 8
16 VDD
15 B
14 A
13 CLEAR
12 CASCADE
11 INHIBIT IN (CARRY)
10 STROBE
9 CLOCK
Functional Diagram
CLOCK
INHIBIT ¹¹
(CARRY) IN
SET TO ⁴
NINE
13
CLEAR
9
÷10
COUNTER
BCD RATE
SELECT INPUTS
A BC D
14 15 2 3
STROBE
10
12 ^CASCADE
RATE
SELECT
LOGIC
OUT
6
OUT
5
RATE
OUTPUTS
“9” OUT
1
7
INHIBIT
(CARRY) OUT
VSS = 8
VDD = 16
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-1216
File Number 3343