80C52 Datasheet, PDF (9/23 Pages) Intel Corporation – CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

8XC52 54 58
DC CHARACTERISTICS (Over Operating Conditions) (Continued)
All parameter values apply to all devices unless otherwise indicated
Symbol
Parameter
Min
Typ
(Note 4)
Max
V_OH1
I_IL
Output High Voltage
(Port 0 in External Bus Mode)
Logical 0 Input Current
(Ports 1 2 and 3)
V_CC^b0 3
V_CC^b0 7
V_CC^b1 5
b₅₀
I_LI
Input leakage Current (Port 0)
I_TL
Logical 1 to 0 Transition Current
(Ports 1 2 and 3)
Commercial
Express
g10
b₆₅₀
b₇₅₀
RRST RST Pulldown Resistor
40
225
CIO
Pin Capacitance
10
I_CC
Power Supply Current
Active Mode
at 12 MHz (Figure 5)
at 16 MHz
at 24 MHz
at 33 MHz (8XC5X-33)
Idle Mode
at 12 MHz (Figure 5)
at 16 MHz
at 24 MHz
at 33 MHz (8XC5X-33)
Power Down Mode
8XC5X-33
15
30
20
38
28
56
35
56
5
75
6
95
7
13 5
7
15
5
75
5
50
Unit
V
V
V
mA
mA
mA
mA
KX
pF
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Test Conditions
I_OH ^{e b}200 mA
I_OH ^{e b}3 2 mA
I_OH ^{e b}7 0 mA
V_IN ^e 0 45V
V_IN ^e V_IL or V_IH
V_IN ^e 2V
1 MHz 25 C
(Note 3)
NOTES
1 Capacitive loading on Ports 0 and 2 may cause noise pulses above 0 4V to be superimposed on the V_OLs of ALE and
Ports 1 2 and 3 The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins
change from 1 to 0 In applications where capacitive loading exceeds 100 pF the noise pulses on these signals may exceed
0 8V It may be desirable to qualify ALE or other signals with a Schmitt Triggers or CMOS-level input logic
2 Capacitive loading on Ports 0 and 2 cause the V_OH on ALE and PSEN to drop below the 0 9 V_CC specification when the
address lines are stabilizing
3 See Figures 6 – 9 for test conditions Minimum V_CC for Power Down is 2V
4 Typicals are based on a limited number of samples and are not guaranteed The values listed are at room temperature
and 5V
5 Under steady state (non-transient) conditions I_OL must be externally limited as follows
Maximum I_OL per port pin
10mA
Maximum I_OL per 8-bit port
Port 0 26 mA
Ports 1 2 and 3 15 mA
Maximum total I_OL for all output pins
71 mA
If I_OL exceeds the test condition V_OL may exceed the related specification Pins are not guaranteed to sink current greater
than the listed test conditions
9