80C52 Datasheet, PDF (22/23 Pages) Intel Corporation – CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

8XC52 54 58
Program Lock Bits
LB1 LB2 LB3
1U
U
U
2P
U
U
3P
P
U
4P
P
P
Table 5 Program Lock Bits and the Features
Protection Type
No Program Lock features enabled (Code verify will still be encrypted by the
Encryption Array if programmed )
MOVC instructions executed from external program memory are disabled from
fetching code bytes from internal memory EA is sampled and latched on
Reset and further programming of the EPROM is disabled
Same as 2 also verify is disabled
Same as 3 also external execution is disabled
NOTE
Any other combination of the lock bits is not defined
EPROM PROGRAMMING AND VERIFICATION CHARACTERISTICS
(T_A ^e 21 C to 27 C V_CC ^e 5V g20% V_SS ^e 0V)
Symbol
Parameter
Min
Max
V_PP
Programming Supply Voltage
12 5
13 0
I_PP
Programming Supply Current
75
1 TCLCL
Oscillator Frequency
4
6
TAVGL
Address Setup to PROG Low
48TCLCL
TGHAX
Address Hold after PROG
48TCLCL
TDVGL
Data Setup to PROG Low
48TCLCL
TGHDX
Data Hold after PROG
48TCLCL
TEHSH
TSHGL
TGHSL
TGLGH
(Enable) High to V_PP
V_PP Setup to PROG Low
V_PP Hold after PROG
PROG Width
48TCLCL
10
10
90
110
TAVQV
Address to Data Valid
48TCLCL
TELQV
ENABLE Low to Data Valid
48TCLCL
TEHQZ
Data Float after ENABLE
0
48TCLCL
TGHGL
PROG High to PROG Low
10
Units
V
mA
MHz
ms
ms
ms
ms
22