319537-003US Datasheet, PDF (65/450 Pages) Intel Corporation – Intel System Controller Hub

Register and Memory Mapping
5.4
5.4.1
Table 12.
I/O Address Space
The I/O map is divided into fixed ranges and variable ranges. Fixed ranges cannot be
moved, but in some cases can be disabled. Variable ranges can be both moved and
disabled.
Fixed I/O Decode Ranges
Table 12 shows the fixed I/O decode ranges from the processor. For each port there
may be separate behavior for reads and writes. Processor cycles that go to reserved
ranges are internally aborted; if the cycle was a read, all 1s will be returned to the
processor.
Fixed I/O Decode Ranges (Sheet 1 of 2)
Port
Size
Number (Bytes)
Read Target
Write Target
20h
2
24h
2
28h
2
2Ch
2
30h
2
34h
2
38h
2
3Ch
2
40h
3
43h
1
50h
3
53h
1
61h
1
63h
1
65h
1
67h
1
70h
1
71h
1
72h
1
73h
1
74h
1
75h
1
76h
1
77h
1
84h
3
88h
1
8Ch
3
8259 Master
8259 Master
8259 Master
8259 Master
8259 Master
8259 Master
8259 Master
8259 Master
8254
None
8254
None
NMI Controller
NMI Controller
NMI Controller
NMI Controller
None
RTC
RTC
RTC
RTC
RTC
RTC
RTC
Internal
Internal
Internal
8259 Master
8259 Master
8259 Master
8259 Master
8259 Master
8259 Master
8259 Master
8259 Master
8254
8254
8254
8254
NMI Controller¹
NMI Controller¹
NMI Controller¹
NMI Controller¹
NMI and RTC
RTC
NMI and RTC
RTC
NMI and RTC
RTC
NMI and RTC
RTC
Internal/LPC
Internal/LPC
Internal/LPC
Can Disable?
No
No
No
No
No
No
No
No
No
No
No
No
No
Yes, alias to 61h
Yes, alias to 61h
Yes, alias to 61h
No
No
Yes, w/ 73h
Yes, w/ 72h
No
No
No
No
No
No
No
Datasheet
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