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LXT9785 Datasheet, PDF (5/226 Pages) Intel Corporation – Advanced 8-Port 10/100 Mbps PHY Transceivers
Contents
4.9.1 100BASE-X Network Operations .........................................................................145
4.9.2 100BASE-X Protocol Sublayer Operations..........................................................145
4.9.2.1 PCS Sublayer ......................................................................................145
4.9.3 PMA Sublayer ......................................................................................................147
4.9.3.1 Link ......................................................................................................148
4.9.3.2 Link Failure Override............................................................................148
4.9.3.3 Carrier Sense/Data Valid (RMII) ..........................................................148
4.9.3.4 Carrier Sense (SMII) ............................................................................148
4.9.3.5 Receive Data Valid (SMII)....................................................................148
4.9.3.6 Twisted-Pair PMD Sublayer .................................................................149
4.9.3.7 Fiber PMD Sublayer.............................................................................149
4.10 10 Mbps Operation ...........................................................................................................150
4.10.1 Preamble Handling ..............................................................................................150
4.10.2 Dribble Bits ..........................................................................................................151
4.10.3 Link Test ..............................................................................................................151
4.10.3.1 Link Failure ..........................................................................................151
4.10.4 Jabber ..................................................................................................................151
4.11 DTE Discovery Process ....................................................................................................152
4.11.1 Definitions ............................................................................................................152
4.11.2 Interaction between Processor, MAC, and PHY ..................................................153
4.11.3 Management Interface and Control .....................................................................153
4.11.4 DTE Discovery Process Flow ..............................................................................154
4.11.5 DTE Discovery Behavior......................................................................................155
4.12 Monitoring Operations ......................................................................................................157
4.12.1 Monitoring Auto-Negotiation ................................................................................157
4.12.2 Per-Port LED Driver Functions ............................................................................157
4.12.3 Out-of-Band Signaling .........................................................................................158
4.12.4 Boundary Scan Interface .....................................................................................159
4.12.5 State Machine ......................................................................................................159
4.12.6 Instruction Register ..............................................................................................159
4.12.7 Boundary Scan Register ......................................................................................159
4.13 Cable Diagnostics Overview .............................................................................................160
4.13.1 Features...............................................................................................................160
4.13.2 Operation .............................................................................................................160
4.13.2.1 Short and Long Cable Testing Requirements ......................................160
4.13.2.2 Precision ..............................................................................................160
4.13.3 Implementation Considerations ...........................................................................161
4.13.4 Basic Implementation ..........................................................................................161
4.14 Link Hold-Off Overview .....................................................................................................162
4.14.1 Features...............................................................................................................162
4.14.2 Operation .............................................................................................................163
5.0 Application Information ............................................................................................................164
5.1 Design Recommendations................................................................................................164
5.2 General Design Guidelines ...............................................................................................164
5.2.1 Power Supply Filtering .........................................................................................164
5.2.2 Power and Ground Plane Layout Considerations................................................165
5.2.2.1 Chassis Ground ...................................................................................165
5.2.3 MII Terminations ..................................................................................................165
5.2.4 Twisted-Pair Interface ..........................................................................................165
5.2.4.1 Magnetic Requirements .......................................................................166
Datasheet
5
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003