80960SA Datasheet, PDF (3/39 Pages) Intel Corporation – EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS

LIST OF FIGURES
PAGE
Figure 1 The 80960SA Processor’s Highly Parallel Architecture ................................................................ 0
Figure 2 80960SA Programming Environment ........................................................................................... 1
Figure 3 Instruction Formats ...................................................................................................................... 4
Figure 4 Multiple Register Sets Are Stored On-Chip .................................................................................. 5
Figure 5 Connection Recommendation for LOCK .................................................................................... 11
Figure 6 Typical Supply Current vs. Case Temperature ........................................................................... 12
Figure 7 Typical Current vs. Frequency (Room Temp) ............................................................................. 12
Figure 8 Typical Current vs. Frequency (Hot Temp) ................................................................................. 13
Figure 9 Capacitive Derating Curve ......................................................................................................... 13
Figure 10 Test Load Circuit for Three-State Output Pins ............................................................................ 13
Figure 11 Drive Levels and Timing Relationships for 80960SA Signals ..................................................... 15
Figure 12 Processor Clock Pulse (CLK2) ................................................................................................... 19
Figure 13 RESET Signal Timing ................................................................................................................. 19
Figure 14 HOLD Timing .............................................................................................................................. 20
Figure 15 80-Lead EIAJ Quad Flat Pack (QFP) Package .......................................................................... 21
Figure 16 84-Lead Plastic Leaded Chip Carrier (PLCC) Package ............................................................. 22
Figure 17 Non-Burst Read and Write Transactions Without Wait States .................................................... 28
Figure 18 Quad Word Burst Read Transaction With 1, 0, 0, 0, 0, 0, 0, 0 Wait States ................................ 29
Figure 19 Burst Write Transaction With 2, 1, 1, 1 Wait States (6-8 Bytes Transferred) .............................. 30
Figure 20 Accesses Generated by Quad Word Read Bus Request,
Misaligned One Byte from Quad Word Boundary 1, 0, 0, 0, 0, 0, 0, 0 Wait States ..................... 31
Figure 21 Interrupt Acknowledge Cycle ...................................................................................................... 32
Figure 22 Cold Reset Waveform ................................................................................................................ 33
LIST OF TABLES
Table 1
80960SA Instruction Set .............................................................................................................. 3
Table 2
Memory Addressing Modes ......................................................................................................... 4
Table 3
80960SA Pin Description: Bus Signals ........................................................................................ 8
Table 4
80960SA Pin Description: Support Signals ................................................................................ 10
Table 5
DC Characteristics ..................................................................................................................... 14
Table 6
80960SA AC Characteristics (10 MHz) ...................................................................................... 16
Table 7
80960SA AC Characteristics (16 MHz) ...................................................................................... 17
Table 8
80960SA AC Characteristics (20 MHz) ...................................................................................... 18
Table 9
80960SA QFP Pinout — In Pin Order ........................................................................................ 23
Table 10 80960SA QFP Pinout — In Signal Order ................................................................................... 24
Table 11 80960SA PLCC Pinout — In Pin Order ...................................................................................... 25
Table 12 80960SA PLCC Pinout — In Signal Order ................................................................................. 26
Table 13 80960SA QFP Package Thermal Characteristics ...................................................................... 27
Table 14 80960SA PLCC Package Thermal Characteristics .................................................................... 27
Table 15 Die Stepping Cross Reference ................................................................................................... 27
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