80960SA Datasheet, PDF (19/39 Pages) Intel Corporation – EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS

80960SA
2.8 AC Specifications
This section describes the AC specifications for the
80960SA pins. All input and output timings are
specified relative to the 1.5V level of the rising edge
of CLK2 and refer to the time at which the signal
crosses 1.5V (for output delay and input setup). All
AC testing should be done with input voltages of
0.4V and 2.4V, except for the clock (CLK2) which
should be tested with input voltages of 0.45V and 0.7
x V_CC. See Figure 11 and Tables 6, 7 and 8 for timing
relationships for the 80960SA signals.
EDGE
A
B
C
D
A
B
C
CLK2
OUTPUTS:
AD15:1, A3:1, D0,
A 31:16, BE1:0,
W/R, DEN, BLAST,
HLDA, LOCK, INTA
AS
1.5V
1.5V
1.5V
T₆
T₉
1.5V VALID OUTPUT1.5V
T_6AS
T_6AS
1.5V
T₈
T₈
T₁₃
T₁₄
ALE
DT/R
INPUTS:
AD15:1, D0,
INT0, INT1,
INT2, INT3
HOLD
LOCK
READY
1.5V
1.5V
T₇
T₆
1.5V
VALID OUTPUT
T₉
1.5V
T₁₀ T₁₁
2.0V 2.0V
0.8V 0.8V
T₁₂ T₁₁
2.0V 2.0V
0.8V 0.8V
VALID INPUT
Figure 11. Drive Levels and Timing Relationships for 80960SA Signals
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