VE28F008 Datasheet, PDF (21/26 Pages) Intel Corporation – 8 MBIT (1 MBIT x 8) FLASH MEMORY

VE28F008
AC CHARACTERISTICS Write Operations^{(1 7)}
Symbol
Parameter
VE28F008-95⁽⁷⁾
Notes
Unit
Min
Max
t_AVAV
t_WC
Write Cycle Time
95
t_PHWL
t_PS
RP High Recovery to WE Going Low
2
1
t_ELWL
t_CS
CE Setup to WE Going Low
10
t_WLWH
t_WP
WE Pulse Width
40
t_VPWH
t_VPS V_PP Setup to WE Going High
2
100
t_AVWH
t_AS
Address Setup to WE Going High
3
40
t_DVWH
t_DS
Data Setup to WE Going High
4
40
t_WHDX
t_DH
Data Hold from WE High
5
t_WHAX
t_AH
Address Hold from WE High
5
t_WHEH
t_CH
CE Hold from WE High
10
t_WHWL
t_WPH WE Pulse Width High
30
t_WHRL
WE High to RY BY Going Low
t_WHQV1
Duration of Byte Write Operation
56
6
t_WHQV2
Duration of Block Erase Operation
56
03
t_WHGL
Write Recovery before Read
0
t_QVVL
t_VPH V_PP Hold from Valid SRD RY BY High
26
0
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
100
ns
ms
sec
ms
ns
NOTES
1 Read timing characteristics during erase and byte write operations are the same as during read-only operations Refer to
AC Characteristics for Read-Only Operations
2 Sampled not 100% tested
3 Refer to Table 3 for valid A_IN for byte write or block erasure
4 Refer to Table 3 for valid D_IN for byte write or block erasure
5 The on-chip Write State Machine incorporates all byte write and block erase system functions and overhead of standard
Intel flash memory including byte program and verify (byte write) and block precondition precondition verify erase and
erase verify (block erase)
6 Byte write and block erase durations are measured to completion (SR 7 e 1 RY BY e V_OH) V_PP should be held at
V_PPH until determination of byte write block erase success (SR 3 4 5 e 0)
7 See AC Input Output Reference Waveforms and AC Testing Load Circuits for testing characteristics
BLOCK ERASE AND BYTE WRITE PERFORMANCE
Parameter
VE28F008-95
Notes
Unit
Min
Typ
Max
Block Erase Time
12
16
10
sec
Block Write Time
12
06
21
sec
NOTES
1 25 C 12 0 V_PP
2 Excludes System-Level Overhead
21