GD82541PI Datasheet, PDF (17/46 Pages) Intel Corporation – 82541 Family of Gigabit Ethernet Controllers

Networking Silicon — 82541(PI/GI/EI)
MDI[3]+/-
A
IEEE_TEST- A
IEEE_TEST+ A
Media Dependent Interface [3].
1000BASE-T: In MDI configuration, MDI[3]+/- corresponds to BI_DC+/-, and in MDI-X
configuration, MDI[3]+/- corresponds to BI_DD+/-.
100BASE_TX: Unused.
10BASE-T: Unused.
IEEE test pin output minus. Used to gain access to the internal PHY clock for
1000BASE-T IEEE physical layer conformance testing.
Analog test pin output plus. Used to gain access to the internal PHY clock for
1000BASE-T IEEE physical layer conformance testing.
3.6
3.7
3.7.1
Test Interface Signals (6)
Symbol
TEST
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST#
Type
Name and Function
Test Enable. Enables test mode.
I
Normal mode: connect to VSS.
I
JTAG Test Access Port Clock.
I
JTAG Test Access Port Data In.
O
JTAG Test Access Port Data Out.
I
JTAG Test Access Port Mode Select.
JTAG Test Access Port Reset. This is an active low reset signal for JTAG.
I
To disable the JTAG interface, this signal should be terminated using pull-
down resistor (1 KΩ for the 82541GI(EI) and 100 Ω for the 82541PI) to
ground. It must not be left unconnected.
Power Supply Connections
Digital and Analog Supplies
Symbol
3.3V
ANALOG_1.8V
CLKR_1.8V
XTAL_1.8V
1.2V
ANALOG_1.2V
PLL_1.2V
Type
Name and Function
P
3.3 V I/O Power Supply.
P
1.8 V Analog Power Supply.
P
1.8 V analog power supply for the clock recovery.
P
Input power for the XTAL regulator.
P
1.2 V Power supply. For analog and digital circuits.
P
1.2 V Analog Power Supply.
P
Input power for the ICS regulator.
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