SA-1110 Datasheet, PDF (1/10 Pages) Intel Corporation – Intel-R StrongARM SA-1110 Microprocessor

Intel^® StrongARM* SA-1110
Microprocessor
Product Features
Brief Datasheet
The Intel^®StrongARM SA-1110 Microprocessor (SA-1110) is a device
optimized for meeting portable and embedded application requirements.
The SA-1110 incorporates a 32-bit StrongARM RISC processor capable of
running at up to 206 MHz. The SA-1110 has a large instruction and data
cache, memory-management unit (MMU), and read/write buffers. The
SA-1110 memory bus interfaces to many device types including
synchronous DRAM (SDRAM), synchronous mask ROM (SMROM), and
SRAM-like variable latency I/O devices with a shared data ready signal. In
addition, the SA-1110 provides system support logic, multiple serial
communication channels, a color/gray scale LCD controller, PCMCIA
support for up to two sockets, and general-purpose I/O ports.
s High performance
s Memory bus
— 150 Dhrystone 2.1 MIPS @ 133 MHz
— 235 Dhrystone 2.1 MIPS @ 206 MHz
— Interfaces to ROM, synchronous mask
ROM (SMROM), Flash, SRAM,
SRAM-like variable latency I/O,
DRAM, and synchronous DRAM
(SDRAM)
s Low power (normal mode) ^†
— Supports two PCMCIA sockets
s 32-way set-associative caches
— <240 mW @1.55 V/133 MHz
— 16 Kbyte instruction cache
— <400 mW @1.75 V/206 MHz
— 8 Kbyte write-back data cache
s Integrated clock generation
s 32-entry MMUs
— Internal phase-locked loop (PLL)
— Maps 4 Kbyte, 8 Kbyte, or 1 Mbyte
— 3.686-MHz oscillator
— 32.768-kHz oscillator
s Power-management features
s Write buffer
— Normal (full-on) mode
— 8-entry, between 1 and 16 bytes each
— Idle (power-down) mode
— Sleep (power-down) mode
s Big and little endian operating modes s Read buffer
— 4-entry, 1, 4, or 8 words
s 3.3-V I/O interface
s 256 mini-ball grid array (mBGA)
† _{Power dissipation, particularly in idle mode, is strongly dependent on the details of the}
system design
Order Number: 278241-005
April 2000