IA59032 Datasheet, PDF (7/17 Pages) InnovASIC, Inc – 32-Bit High Speed Microprocessor Slice

IA59032
32-Bit High Speed Microprocessor Slice
Page 7 of 17
Data Sheet
I/O SIGNAL DESCRIPTION
The diagram below describes the I/O characteristics for each signal on the IC. The signal names correspond
to the signal names on the pinout diagrams provide.
I/O CHARACTERISTICS:
SIGNAL NAME
I/O
A(4:0)
I
B(4:0)
I
I(8:0)
I
Q31
RAM31
I/O
Q0
RAM0
I/O
D(31:0)
I
Y(31:0)
O
OEn
I
OVR
O
FZERO
O
F31
O
Cn
I
Cn32
O
CP
I
DESCRIPTION
The five address inputs to the on board RAM used to select word to be displayed
throught the A-port
Addresses which select the word of on board RAM which is to be diplayed through the B-
port and into which data is written when the clock is low.
The nine instruction control lines. Used to determine what data sources will be applied
to the ALU(I(2:0)), what function the ALU will perform (I(5:3)), and what data is to be
deposited in the Q-register or on board RAM (I(8:6)).
Signal paths at the MSB of the on-board RAM and the Q-register which are used for
shifting data. When the destination code on I(8:6) indicates an up shift(Octal 6 or 7) the
three state outputs are enabled and the MSB of the Q-register is available on the Q31 pin.
Otherwise the pins appear as inputs. When the destination code calls for a down shift the
pins are used as the data inputs to the MSB of the Q-register (Octal 4) and RAM (Octal 4
and 5).
Shift lines similar to the Q31 and RAM 31; however the decription is applied to the LSB
of RAM and the Q-register.
Direct data inputs which may be selected as one of the ALU data sources for entering
data into the device. D0 is the LSB.
Tri-statable outputs which, when enabled, display either the data on the A-port of the
register stack or the outputs of the ALU as determined by the destination code I(8:6).
Output enable. When HIGH, the Y outputs are in the high impedance state. When
LOW, either the contents of the A-register or the outputs of the ALU are displayed on
Y(31:0).
Overflow. This signal indicates that an overflow into the sign bit has occurred as a result
of a two's complement operation.
This output, when HIGH, indicates that the result of an ALU operation is zero.
The most significnt ALU output bit.
The carry-in to the ALU.
The carry-out of the ALU.
The clock input. The clock low time is the write enable to the on-board dual port RAM,
including set-up time fot the A and B - portregisters. The A and B- port outputs change
while the clock is HIGH. The Q-register is latched on the clock LOW-to-HIGH
transition.
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