IA59032 Datasheet, PDF (13/17 Pages) InnovASIC, Inc – 32-Bit High Speed Microprocessor Slice

IA59032
32-Bit High Speed Microprocessor Slice
Page 13 of 17
Data Sheet
CYCLE TIME AND CLOCK CHARACTERISTICS:
READ-MODIFY-WRITE (from select of A, B
registers to end of cycle)
Maximum Clock Frequency to Shift Q (50% duty
cycle, I=432 or 632)
Minimum Clock Low Time
Minimum Clock High
Minimum Clock Period
60ns
23.6 MHz
28ns
30ns
60ns
OUTPUT ENABLE/DISABLE TIME:
From OEn LOW to Y output enable
36ns
From OEn HIGH to Y output enable
30ns
COMBINATIONAL PROPAGATION DELAYS (Cl = 50 pf):
To Output
Y F31 C_n+32 FZERO OVR RAM0, Q0, UNITS
RAM31 Q31
From A,B Address 66 68 58
66
62 75
--
Input _D(31:0)
45 45 35
45
35 48
--
C_n
36 36 18
36
32 42
--
I(2:0)
46 46 35
46
41 58
--
I(5:3)
I(8:6)
51 51 41
51
22 -- --
--
46 53
--
22
--
20
ns
A Bypass
48 -- --
--
--
--
--
ALU
(I=2XX)
Clock
51 51 42
51
48 59
22
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innovASIC
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