IA82510 Datasheet, PDF (3/14 Pages) InnovASIC, Inc – ASYNCHRONOUS SERIAL CONTROLLER

IA82510
ASYNCHRONOUS SERIAL CONTROLLER
Data Sheet
As of Production Ver. 01
Functional Overview
Transmitter
The Transmit function consists of a 4 × 11 bit FIFO, and a Transmit Engine. The 4 × 11 FIFO is
configurable as any depth between one and four words inclusive. The transmit engine is
responsible for reading the data out of the FIFO and placing it in the proper order on the TXD pin.
The transmit engine is highly configurable to be compatible with numerous formats, including
16450 and 8250 modes of communication. Transmit Communication parameters that can be
programmed include:
• Parity modes
• Stop Bits
• Character Length
• FIFO Depth
• Clocking Options
• RTS and CTS modes
See the Register Description for more details.
Receiver
The Receiver function consists of a 4 × 11 configurable FIFO and a Receive Engine. The receive
engine is responsible for sampling the data on the RXD input pin, formatting the data, and placing
the data in the FIFO. The receive engine is highly configurable with parameters that include:
• Parity modes
• Stop Bits
• Character Length
• FIFO Depth
• Clocking Options
• Address Matching Options
• Control Character Detection
• RTS and CTS modes
See the Register Description for more details.
Bus Interface
The Bus Interface is a simple interface that allows a micro-processor or micro-controller to read
and write the IA82510 Registers. It consists of the following I/O lines:
• A0, A1, A2 : 3 Bit Address
• D0-D7 :
8 Bit Data
• RDn:
Active Low Read Enable
• WRn:
Active Low Write Enable
• CSn:
Active Low Chip Select
• INT:
Interrupt Output
• RESET:
Chip Reset
Copyright © 2001
innovASIC
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