IA82510_11 Datasheet, PDF (18/25 Pages) InnovASIC, Inc – Asynchronous Serial Controller

IA82510
Asynchronous Serial Controller
Data Sheet
February 25, 2011
7. Errata
The following errata are known problems with the IA82510. This is inclusive of all package types
and environment grades. A workaround to the identified problem has been provided where
possible. All errata listed in production Version 00 have been fixed in Version 01 of the device
unless otherwise noted. Version 02 is the result of a migration to a new fab process to ensure
long-term supply. It retains the same functionality and errata as the Version 01 device.
7.1 Summary
Table 8 presents a summary of errata.
Table 8. Summary of Errata
Errata
No.
1
Problem
Scrambled data during boot code shuts down UART, however
device works for application code.
2 Device does not operate at 8 MHz in divide-by-one mode.
3 Setting CLCF to x30, which effectively generates the TX clock
from the incoming SCLK signal, kills all transmits.
4 Receiving streamed data has many framing errors and corrupt
data when connected to some modems.
5 Transmission of streamed data does not return interrupt.
6 Receiving streamed data has many framing errors at fast baud
rates (divisor=6) through bad modem lines.
7 Difficulty starting oscillator with crystal.
8 Intermittent and temperature sensitive crystal oscillator
operation when cycling power.
9 Auto-acknowledge of interrupts via writing of LSR does not
work.
10 ICM Status Clear command does not clear LSR/RST overrun
error.
11 In semi-automatic/uLAN mode, the RX FIFO is only opened
when an address character matches the ACR1 or ACR0
registers (like full auto mode).
Ver. 00 Ver. 01 Ver. 02
Exists Fixed Fixed
Exists
Exists
Fixed
Fixed
Fixed
Fixed
Exists Fixed Fixed
Exists
Exists
Fixed
Fixed
Fixed
Fixed
Exists
Exists
Fixed
Fixed
Fixed
Fixed
Exists Fixed Fixed
Exists Fixed Fixed
Exists Fixed Fixed
®
IA211001219-05
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