TC1766 Datasheet, PDF (9/32 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller Bare Die Delivery

TC1766
Bare Die Delivery
General Device Information
2
General Device Information
2.1
Block Diagram
PMI
1 6 KB SPRAM
8 KB ICACHE
PMU
16 KB BROM
1504 KB Pflash
32 KB DFlash
8 KB OVRAM
Emulation Memory Interface
OCDS Debug
Interface/JTAG
FPU
TriCore
(TC1.3M)
CPS
DMI
56 KB LDRAM
Local Memory Bus (LMB)
LBCU
LFI Bridge
8 KB PRAM
PCP2
Core
STM
Abbreviations:
ICACHE:
SPRAM:
Instruction Cache
Scratch-Pad RAM
LDRAM:
OVRAM:
Local Data RAM
Overlay RAM
BROM:
Boot ROM
PFlash:
DFlash:
Program Flash
Data Flash
PRAM:
CMEM:
Parameter Memory in PCP
Code Memory in PCP
Shaded:
Only available in TC1766ED
ASC0
ASC1
GPTA
12 KB CMEM
SBCU
SCU PPLLLL
Ext.
Request
Unit
Multi CAN
(2 Nodes,
64 Buffer)
f _{FP I}
f_CPU
MSC0
MLI1
Ports
DMA
8 ch.
SMIF
MLI0
Mem
Check
SSC0
SSC1
ADC0
32 ch.
FADC
2 ch.
Figure 1 TC1766 Block Diagram
MCB06056_bd
Data Sheet
5
V1.10, 2010-04