TDA4916GG Datasheet, PDF (8/30 Pages) Siemens Semiconductor Group – SMPS-IC with MOSFET Driver Output

TDA 4916 GG
Comparator K1 (duty factor setting for voltage mode control)
The two plus inputs of the comparator are so connected that the lower plus level is
always compared with the minus input level. As soon as the voltage of the rising edge of
the sawtooth (minus input) exceeds the lower of the two plus input levels, the output is
inhibited via the turn-OFF Flip-Flop, that is to say the High time of the output can be
continuously varied. Since the frequency remains constant, this corresponds to a duty
factor change.
Comparator K2
The comparator has a switching threshold at 1.5 V. Its output sets the fault Flip-Flop
when the voltage on capacitor C_a lies below 1.5 V. However, the fault Flip-Flop accepts
the setting pulse only if no reset pulse (fault) is applied. This prevents resetting of the
output as long as a fault signal is present.
Comparators K3 (overvoltage), K4 (undervoltage), V_S Undervoltage, V_REF
Overcurrent
These are fault detectors which cause the output to be inhibited immediately by the fault
Flip-Flop when faults occur. When faults are no longer present, the duty factor is
reestablished via the soft start C_SS. In the event of undervoltage, a current is injected at
the input of K4 with the aid of which an adjustable hysteresis or latching is made
possible. The value of the hysteresis is determined by the internal resistance of the
external drive source and the current injected internally at the input of K4. In the event
of undervoltage at K4, the injected current flows into the device.
Comparator K5 (duty factor setting for current mode control)
K5 is used to sense the source current at the switching transistor. The plus input of the
comparator is fed out. Enabling of output Q SIP after cessation of the fault is effected
with an H signal at the turn-OFF Flip-Flop output.
Comparator K6 (overcurrent turn-OFF)
The turn-OFF Flip-Flop is reset when overcurrent is detected by K6. In combination with
the pulse-omission facility, individual pulses can then be omitted. This then results in a
limited rise in the output current with a rising overload at the output.
Version 2.0
8
1 May 1996