ICE2QS02G Datasheet, PDF (8/17 Pages) Infineon Technologies AG – Quasi-Resonant PWM Controller

Quasi-Resonant PWM Controller
ICE2QS02G
Funtional Description
In the ICE2QS02G, the number of zero crossing is
limited to 7. Therefore, the counter varies between 1
and 7, and any attempt beyond this range is ignored.
When V_FB exceeds V_FBZR1 voltage, the up/down
counter is initialised to 1, in order to allow the system to
react rapidly to a sudden load increase. The up/down
counter value is also intialised to 1 at the start-up, to
ensure an efficient maximum load start up. Figure 4
shows some examples on how up/down counter is
changed according to the feedback voltage over time.
The use of two different thresholds V_RL and V_RH to
count upward or downward is to prevent frequency
jittereing when the feedback voltage is close to the
threshold point. However, for a stable operation, these
two thresholds must not be affected by the foldback
current limitation (see Section 3.4.1), which limits the
V_CS voltage. Hence, to prevent such situation, the
threshold voltages, V_FBZL and V_FBZH, are changed
internally depending on the line voltage levels.
clock
T=48ms
t
V_FB
V_FBZR1
V_FBZH
V_FBZL
Up/down
counter
t
1
Case 1 4 5 6 6 6 6 5 4 3 1
Case 2 2 3 4 4 4 4 3 2 1 1
Case 3 7 7 7 7 7 7 6 5 4 1
Figure 4 Up/down counter operation
3.3.1.2 Zero crossing (ZC counter)
In the system, the voltage from the auxiliary winding is
applied to the zero-crossing pin through a RC network,
which provides a time delay to the voltage from the
auxiliary winding. Internally, this pin is connected to a
clamping network, a zero-crossing detector, an output
overvoltage detector and a ringing suppression time
controller.
During on-state of the power switch a negative voltage
applies to the ZC pin. Through the internal clamping
network, the voltage at the pin is clamped to around -
0.2V.
The ZC counter has a minimum value of 0 and
maximum value of 7. After MOSFET is turned off, every
time when the falling voltage ramp of on ZC pin crosses
the V_ZCCT (100mV) threshold, a zero crossing is
detected and ZC counter will increase by 1. It is reset
to 0 every time after the GATE output is changed to
high.
The voltage v_ZC is also used for the output overvoltage
protection. Once the voltage at this pin is higher than
the threshold V_ZCOVP (4.5V) during off-time of the main
switch, the IC is latched off after a fixed blanking time
(t_ZCOVP).
To achieve the switch-on at minimum value of drain-
source voltage, the voltage from the auxiliary winding is
fed to a time delay network (the RC network consists of
R_zc1, R_zc2 and C_zc as shown in typical application circuit)
before it is applied to the zero-crossing detector
through the ZC pin. The needed time delay to the main
oscillation signal ∆t should be approximately one fourth
of the oscillation period (by transformer primary
inductor and drain-source capacitor) minus the
propagation delay from thedetected zero-crossing to
the switch-on of the main switch t_delay, theoretically:
∆t = ^{T----o-4---s---c-} – tdelay
[1]
This time delay should be matched by adjusting the
time constant of the RC network which is calculated as:
τ_td
=
Cz
c
⋅
-R-----z---c---1----^â‹---R-----z---c---2--
Rzc1 + Rzc2
[2]
3.3.1.3 Ringing suppression time
After MOSFET is turned on, there will be some
oscillation on V_DS, which will also appear on the voltage
on ZC pin. To avoid that the MOSFET is turned on
mistriggerred by such oscillations, a ringing
suppression timer is implemented. The time is
dependent on the voltage v_ZC. When the voltage v_ZC is
lower than the threshold V_ZCRS, a longer preset time
applies, while a shorter time is set when the voltage v_ZC
is higher than the threshold.
3.3.1.4 Switch on determination
After the gate drive goes to low, it can not be changed
to high during ring suppression time.
After ring suppression time, the gate drive can be
turned on when the ZC counter value is higher or equal
to up/down counter value.
However, it is also possible that the oscillation between
primary inductor and drain-source capacitor attenuates
very fast and IC can not detect enough zero crossings
and ZC counter value will not be high enough to turn on
the gate drive. In this case, a maximum switching
period (T_PerMax) is implemented. After the specified
period since last time Gate is turned on, the gate drive
will be turned on again regardless of the counter values
and V_ZC. This function can effectively prevent the
Version 2.0
8
13 June 2008