1ED020I12FTA Datasheet, PDF (8/27 Pages) Infineon Technologies AG – Single IGBT Driver IC

EICEDRIVER®
1ED020I12FTA
Functional Description
2
Functional Description
2.1
Introduction
The 1ED020I12FTA is an advanced IGBT gate driver for motor drives typical greater 10kW. Control and protection
functions are included to make possible the design of high reliability systems.
The device consists of two galvanic separated parts. The input chip can be directly connected to a standard 5V
DSP or microcontroller with CMOS in/output and the output chip is connected to the high voltage side.
An effective active Miller clamp function avoids the need of negative gate driving in some applications and allows
the use of a simple bootstrap supply for the high side driver.
A rail-to-rail driver output enables the user to provide easy clamping of the IGBTs gate voltage during short circuit
of the IGBT. So an increase of short circuit current due to the feedback via the Miller capacitance can be avoided.
Further, a rail-to-rail output reduces power dissipation.
The device also includes an IGBT desaturation protection with a FAULT status output.
A two-level turn-off feature with adjustable delay protects against excessive overvoltage at turn-off in case of
overcurrent or short circuit condition. The same delay is applied at turn-on to prevent pulse width distortion.
A READY status output reports if the device is supplied and operates correctly.
2.2
Internal Protection Features
2.2.1 Undervoltage Lockout (UVLO)
To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for both chips.
If the power supply voltage V_VCC1 of the input chip drops below V_UVLOL1 a turn-off signal is sent to the output chip
before power-down. The IGBT is switched off and the signals at IN+ and IN- are ignored as long as V_VCC1 reaches
the power-up voltage V_UVLOH1 .
If the power supply voltage V_VCC2 of the output chip goes down below V_UVLOL2 the IGBT is switched off and signals
from the input chip are ignored as long as V_VCC2 reaches the power-up voltage V_UVLOH2 .
2.2.2 READY status output
The READY output at pin /RDY shows the status of three internal protection features.
• UVLO of the input chip
• UVLO of the output chip after a short delay
• Internal signal transmission
It is not necessary to reset the READY signal since its state only depends on the status of the former mentioned
protection signals.
2.2.3 Watchdog Timer
The 1ED020I12FA incorporates two levels of protection to ensure signal integrity by two independent watchdog
timers. First level ensures the short term signal integrity by resending the (turn on/off) signals with a watchdog
period of typical 500ns. The second level monitors the internal signal transmission during normal operation. If the
transmission fails for a given time, the IGBT is switched off and the READY output reports an internal error.
2.2.4 Active Shut-Down
The Active Shut-Down feature ensures a safe IGBT off-state if the output chip is not connected to the power
supply.
Preliminary Datasheet
6
Version 1.2, 2010-05-21