TLE6232GP_09 Datasheet, PDF (7/20 Pages) Infineon Technologies AG – Smart Six Channel Low-Side Switch

Data Sheet TLE 6232 GP
Description of the Power Stages
4 low side power switches for nominal currents up to 3A (power stages OUT1 to OUT4). Con-
trol is possible by input pins or via SPI. For T_J = 150°C the on-resistance of the power
switches is below 500mΩ.
2 low side power switches for nominal currents up to 1.5A (power stages OUT5 and OUT6).
Control is possible by input pins or via SPI. For T_J = 150°C the on-resistance of the power
switches is below 1Ω.
In order to increase the switching current or to reduce the power dissipation parallel connec-
tion of power stages is possible.
Each of the 6 output stages is equipped with its own zener clamp, which limits the output volt-
age to a maximum of 60V. The outputs are provided with a current limitation set to a minimum
of 1.5A resp. 3A. Each power stage is equipped with an own temperature sensor.
Each output is protected by embedded protection functions⁵⁾. In case of overload or short-
circuit to U_Batt the current is internally limited and the corresponding bit combination is set
(early warning). If this operation leads to an over-temperature condition, a second protection
level (about 170°C) will change the output into a low duty cycle PWM (selective thermal shut-
down with restart) to prevent critical chip temperatures.
The following faults can be detected (individually for each output):
- short to UBatt: (SCB/overload) can be detected when switches are
- short to ground: (SCG) can be detected when switches are
- open load:
(OL) can be detected when switches are
- over-temperature: (OT) will only be detected when switches are
On state
Off state
Off state
On state
The fault conditions SCB, SCG and OL will not be stored until an integrated filtering time is
expired (please note for PWM application). If, at one output, several errors occur in a se-
quence, always the last detected error will be stored (with filtering time). All fault conditions
are encoded in two bits per switch and are stored in the corresponding SPI registers. Additio-
nally there are two central diagnostic bits: one especially for over-temperature (latched result
of an OR-operation out of the 6 signals of the temperature sensor) and one for fault occur-
rence at any output. A fault that has been detected and stored in the fault register must not be
replaced by o.k.-state (11) unless it is read out by the RD_DIAG command sent by the micro-
controller or an internal or external reset has been applied. I.e. the fault register will be
cleared only by the RD_DIAG command.
PRG - Program pin. PRG = High (V_S): Parallel inputs Channel 1 to 6 are high active
PRG = Low (GND): Parallel inputs Channel 1 to 6 are low active.
If the parallel input pins are not connected (independent of high or low activity), channels 1 to
6 are switched OFF.
PRG pin itself is internally pulled down when it is not connected.
5) _{The integrated protection functions prevent device destruction under fault conditions and may not be used in}
normal operation or permanently.
V2.3
Page 7
2009-11-18