TLE6232GP_09 Datasheet, PDF (11/20 Pages) Infineon Technologies AG – Smart Six Channel Low-Side Switch

Data Sheet TLE 6232 GP
- SCON_REG: 8-bit (1 byte) length for serial control of the outputs (serial data bits)
- DIAG_REG: 16-bit (2 byte) length. Contains the diagnostic information (2 bits per chan-
nel), a common over-temperature bit and a common fault bit.
Registers MUX_REG and SCON_REG are writeable as well as readable from the microcon-
troller. The DIAG_REG can only be read from the µC.
This leads to five different control bytes which are recognized by the IC. The following table
shows the different modes.
MSB
LSB MSB
LSB
WR_SCON SI:
SO:
H L L H H L X X D6 D5 D4 D3 D2 D1 X X
Z Z F OT DIA6 DIA5 ^{DIA4 DIA3 DIA2 DIA1}
Write to SCON Register.
RD_SCON SI:
SO:
HLLHLHXX
Z Z F OT DIA6 DIA5
X X X X X X X X Read SCON Register
SCON6 .. . SCON1 H H
WR_MUX SI:
SO:
HLHLHLXX
Z Z F OT DIA6 DIA5
M6 M5 M4 M3 M2 M1 X X _{Write to MUX Register.}
DIA4 DIA3 DIA2 DIA1
RD_MUX SI:
H L H L L H X X ^{X X X X X X X X} Read MUX Register
SO: _{Z Z F OT DIA6 DIA5}
MUX6 . . MUX1 H H
RD_DIAG SI:
SO
HLLLLL XX
Z Z F OT DIA6 DIA5
X X X X X X X X _{Read DIAG Register}
DIA4 DIA3 DIA2 DIA1
SI Control Byte
SI Data Byte
Note:
’X’ means ’don’t care’, because data will be ignored
’Dx’ represents the serial data bits, either being H (= OFF) or L (= ON)
’Mx’ enables parallel control of channel x H (=parallel) or L (=serial)
’Z’ means tri-state
’F’ is the common fault flag
’OT’ is the common over-temperature flag
’DIAx’ is the 2 bit diagnosis information per channel
All other possible control bytes will lead to an ignorance of the data bits, but the full diagnosis
information (like RD_DIAG command) is provided at the SO line. A reset of all fault registers
(and OT bit) the will only be done if the RD_DIAG command was clocked in.
Characteristics of the SPI Interface
If the slave select signal at CS is High or bit 7 and bit 6 of the instruction byte differ from „1“
and „0“, the state machine is set on default condition, i.e. the state machine expects an in-
struction.
If the 5V-reset (RESET) is active, the SPI output SO is switched into tri-state.
In order to increase the possible number of SPI participants on one and the same CS signal,
bits 7 and 6 of the instruction byte are fixed as shown above. While receiving the first two bits
of the instruction byte the data output SO has to be in tri-state. After having received the first
two bits TLE6232 has to decide if it is addressed (bit 7 = high, bit 6 = low). In this case the
remaining 6 bits of the instruction byte and the data byte are accepted and the diagnostic
feedback respectively the data byte content (MUX, SCON) is sent to the microcontroller. Oth-
erwise instruction and data bits are rejected and SO remains in tri-state.
V2.3
Page 11
2009-11-18