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TLE4678 Datasheet, PDF (7/31 Pages) Infineon Technologies AG – Low Drop Out Linear Voltage Regulator 5 V Fixed Output Voltage
TLE4678
Pin Configuration
3.4
Pin Definitions and Functions PG-SSOP-14
Pin
Symbol
1
WO
3
WADJ
4
GND
5
D
7
RADJ
8
WI
10
Q
12
I
14
RO
2, 6, 9, n. c.
11, 13,
Exposed pad
Function
Watchdog Output
Open collector output with an internal pull-up resistor to the output Q.
An additional external pull-up resistor to the output Q is optional.
Leave open if the watchdog function is not needed.
Watchdog Activating Threshold Adjust
An external resistor to GND determines the watchdog activating threshold.
Connect directly to GND for disabling the watchdog.
Connect directly to GND if the watchdog function is not needed.
Connect to output Q via 270 kΩ resistor for permanently activating the watchdog.
IC Ground
Interconnect with the exposed pad and heatsink area on PCB.
Reset Delay and Watchdog Timing
Connect a ceramic capacitor D (pin 6) to GND for reset delay and watchdog timing
adjustment.
Leave only open if both, the reset and the watchdog function are not needed.
Reset Switching Threshold Adjust
For reset threshold adjustment connect to a voltage divider from output Q to GND.
For triggering the reset at the internally determined threshold, connect this pin directly to
GND.
Connect directly to GND if the reset function is not needed.
Watchdog Input
Positive edge triggered input, usable for microcontroller monitoring.
Connect to GND if the watchdog function is not needed.
5 V Regulator Output
Block to GND with a capacitor close to the IC pins, respecting capacitance and ESR
requirements given in the Chapter 4.2 Functional Range.
Regulator Input and IC Supply
For compensating line influences, a capacitor to GND close to the IC pins is
recommended.
Reset Output
Open collector output with an internal pull-up resistor to the output Q.
An additional external pull-up resistor to the output Q is optional.
Leave open if the reset function is not needed.
Internally not connected
Connection to GND on PCB recommended.
Connect to heat sink area on PCB. Interconnect with GND.
Datasheet
7
Rev. 1.1, 2009-08-27