ICE3RBR0665JG Datasheet, PDF (7/32 Pages) Infineon Technologies AG – Fixed-Frequency, 650V CoolSET™ in DS0-12 Package

Fixed-Frequency, 650V CoolSET™ in DS0-12 Package
Functional Description
3.3
Improved Current Mode
Figure 5 Current Mode
Soft-Start Comparator
FB
C8
0.67V
PWM OP
x3.3
Improved
Current Mode
PWM-Latch
RQ
Driver
SQ
CS
Current Mode means the duty cycle is controlled by the slope of the primary current. This is done by comparing
the FB signal with the amplified current sense signal.
Amplified Current Signal
FB
0.67V
Driver
t
ton
t
Figure 6 Pulse Width Modulation
In case the amplified current sense signal exceeds the FB signal the on-time Ton of the driver is finished by
resetting the PWM-Latch (Figure 6).
The primary current is sensed by the external series resistor RSense inserted in the source of the integrated
CoolMOS^TM. By means of Current Mode regulation, the secondary output voltage is insensitive to the line
variations. The current waveform slope will change with the line variation, which controls the duty cycle.
The external RSense allows an individual adjustment of the maximum source current of the integrated
CoolMOS^TM.
To improve the Current Mode during light load conditions the amplified current ramp of the PWM-OP is
superimposed on a voltage ramp, which is built by the switch T2, the voltage source V1 and a resistor R1 (Figure
7). Every time the oscillator shuts down for maximum duty cycle limitation the switch T2 is closed by VOSC. When
the oscillator triggers the Gate Driver, T2 is opened so that the voltage ramp can start.
In case of light load the amplified current ramp is too small to ensure a stable regulation. In that case the
Voltage Ramp is a well defined signal for the comparison with the FB-signal. The duty cycle is then controlled
by the slope of the Voltage Ramp.
By means of the time delay circuit which is triggered by the inverted VOSC signal, the Gate Driver is switched-off
until it reaches approximately 156 ns delay time (Figure 8). It allows the duty cycle to be reduced continuously
till 0% by decreasing VFB below that threshold.
Data Sheet
7
Revision 1.0
2016-05-12