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TLE7259-3 Datasheet, PDF (6/32 Pages) Infineon Technologies AG – LIN Transceiver
TLE7259-3
Functional Description
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Functional Description
The LIN Bus is a single wire, bi-directional bus, used for in-vehicle networks. The LIN Transceiver TLE7259-3 is
the interface between the microcontroller and the physical LIN Bus (see Figure 16 and Figure 17). The logical
values of the microcontroller are driven to the LIN bus via the TxD input of the TLE7259-3. The transmit data
stream on the TxD input is converted to a LIN bus signal with optimized slew rate to minimize the EME level of the
LIN network. The RxD output reads back the information from the LIN bus to the microcontroller. The receiver has
an integrated filter network to suppress noise on the LIN Bus and to increase the EMI (Electro Magnetic Immunity)
level of the transceiver.
Two logical states are possible on the LIN bus according to the LIN Specification 2.2A (see Figure 3):
In dominant state, the voltage on the LIN bus is set to the GND level. In recessive state, the voltage on the LIN
bus is set to the supply voltage VS. By setting the TxD input of the TLE7259-3 to “Low” the transceiver generates
a dominant level on the BUS interface pin. The RxD output reads back the signal on the LIN bus and indicates a
dominant LIN bus signal with a logical “Low” to the microcontroller. Setting the TxD pin to “High” the transceiver
TLE7259-3 sets the LIN interface pin BUS to the recessive level, at the same time the recessive level on the LIN
bus is indicated by a logical “High” on the RxD output.
Every LIN network consists of a master node and one or more slave nodes. To configure the TLE7259-3 for master
node applications, a resistor in the range of 1 kΩ and a reverse diode must be connected between the LIN bus
and the power supply VS or the INH pin of the TLE7259-3 (see Figure 16 and Figure 17).
VIO
TxD
Recessive
Dominant
Recessive
VS
Recessive
BUS
Dominant
t
Recessive
VIO
RxD
Recessive
Figure 3 LIN bus signals
Data Sheet
Dominant
t
Recessive
t
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Rev. 1.0, 2013-08-13