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TLE7259-3 Datasheet, PDF (24/32 Pages) Infineon Technologies AG – LIN Transceiver
TLE7259-3
Application Information
7
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
7.1
Compatibility with other Infineon LIN Transceivers
The TLE7259-3 is pin-to-pin compatible with other Infineon LIN transceivers in PG-DSO-8 package (TLE7257SJ
and TLE7258SJ) and in PG-TSON-8 package (TLE7257LE, TLE7258D and TLE7258LE). The only differences
are the pins named N.C (= Not Connected) which can be left open on the PCB in applications where these
functionalities are not needed. The N.C. pins are internally not bonded, so the devices will not be affected if these
pins are connected to signals on the application PCB.
RxD
1
EN
2
WK
3
TxD
4
8
INH
7
VS
6
BUS
5
GND
TLE7259-3GE
RxD
1
EN
2
N.C.
3
TxD
4
8
INH
7
VS
6
BUS
5
GND
RxD
1
EN
2
N.C.
3
TxD
4
8
INH
7
VS
6
BUS
5
GND
TLE7257SJ
TLE7258SJ
Figure 14 Pin compatibility between TLE7259-3GE, TLE7257SJ and TLE7258SJ
Table 7 Functionality of LIN transceiver family, PG-DSO-8 package
Device
TLE7259-3GE
TLE7257SJ
Applications
High End LIN
Standard LIN
Master node
Features
Fast Programming mode
✔
–
Local Wake input
✔
–
Inhibit output usage
VREG control
Master Termination
VREG control
TxD Timeout
✔
✔
Power-Up mode
Standby mode
Sleep mode
TLE7258SJ
Standard LIN
Slave node
–
–
VREG control
✔
Standby mode
Data Sheet
24
Rev. 1.0, 2013-08-13