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TLE94108EL Datasheet, PDF (50/76 Pages) Infineon Technologies AG – a protected eight-fold half-bridge driver designed especially for automotive motion control applications | |||
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TLE94108EL
Serial Peripheral Interface (SPI)
7.5
SPI Bit Mapping
The SPI Registers have been mapped as shown in Figure 25 and Figure 26 respectively.
The control registers are READ/ WRITE registers. To set the control register to READ, bit 7 of the address byte
(OP bit) must be programmed to â0â, otherwise â1â for WRITE.
The status registers are READ/CLEAR registers. To CLEAR any Status Register, bit 7 of the address byte must be
set to â1â, otherwise â0â for READ.
15
14
13
12
11
10
9
8 Data Bits [D7â¦D0]
for Configuration & Status Information
HB_ACT_1_CTRL
HB_ACT_2_CTRL
HB_MODE_1_CTRL
HB_MODE_2_CTRL
PWM_CH_FREQ_CTRL
PWM1_DC_CTRL
PWM2_DC_CTRL
PWM3_DC_CTRL
FW_OL_CTRL
FW_CTRL
CONFIG_CTRL
SYS_DIAG_1 : Global status 1
SYS_DIAG_2 : OP ERROR_1_STAT
SYS_DIAG_3 : OP ERROR_2_STAT
SYS_DIAG_5 : OP ERROR_4_STAT
SYS_DIAG_6 : OP ERROR_5_STAT
Figure 25 TLE94108EL SPI Register mapping
8
7
65432 1 0
8 Address Bits [A7â¦0]
Access
type
read/write 0 0 0 0 0 LABT 1
read/write 1 0 0 0 0 LABT 1
read/write 1 1 0 0 0 LABT 1
read/write 0 0 1 0 0 LABT 1
read/write 0 1 1 0 0 LABT 1
read/write 1 1 1 0 0 LABT 1
read/write 0 0 0 1 0 LABT 1
read/write 1 0 0 1 0 LABT 1
read/write 0 1 0 1 0 LABT 1
read/write 1 1 0 1 0 LABT 1
read 1 1 0 0 1 LABT 1
read/clear 0 0 1 1 0 LABT 1
read/clear 1 0 1 1 0 LABT 1
read/clear 0 1 1 1 0 LABT 1
read/clear 0 0 0 0 1 LABT 1
read/clear 1 0 0 0 1 LABT 1
Note:
LABT: Last Address Bit Token, refer to Chapter 7.2 and Chapter 7.3.
Data Sheet
50
1.0
2016-08-27
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