TLE42764_11 Datasheet, PDF (5/20 Pages) Infineon Technologies AG – Low Dropout Linear Voltage Regulator

3.3
Pin Assignment PG-SSOP-14 exposed pad
TLE42764
Pin Configuration
n.c.
1
EN
2
n.c.
3
GND
4
n.c.
5
n.c.
6
n.c.
7
14
13
12
11
10
9
8
PINCONFIG_SSOP-14.SVG
n.c.
I
n.c.
n.c.
n.c.
Q
n.c.
Figure 3 Pin Configuration (top view)
3.4
Pin Definitions and Functions PG-SSOP-14 exposed pad
Pin No.
1, 3, 5-7
2
4
8, 10-12, 14
9
13
Exposed Pad
Symbol Function
n.c.
non connected
can be open or connected to GND
EN
Enable Input
high level input signal enables the IC;
low level input signal disables the IC;
integrated pull-down resistor
GND Ground
n.c.
non connected
can be open or connected to GND
Q
Output
block to ground with a capacitor close to the IC terminals, respecting the values given
for its capacitance and ESR in “Functional Range” on Page 7
I
Input
block to ground directly at the IC with a ceramic capacitor
–
Exposed Pad
connect to GND and heatsink area
Data Sheet
5
Rev. 1.2, 2011-02-15