ICE3PCS02G Datasheet, PDF (5/20 Pages) Infineon Technologies AG – Standalone Power Factor Correction (PFC) Controller in Continuous Conduction Mode (CCM)

CCM-PFC
Preliminary Datasheet ICE3PCS02G
Pin Configuration and Functionality
1
Pin Configuration and Functionality
1.1 Pin Configuration
ratings. Therefore a series resistor (R_CS) of around 50Ω
is recommended in order to limit this current into the IC.
Pin Symbol Function
1
ISENSE Current Sense Input
2
GND IC Ground
3
ICOMP Current Loop Compensation
4
FREQ Switching Frequency Setting
5
OVP Over Voltage Protection
6 VSENSE Bulk Voltage Sense
7
VCC IC Supply Voltage
8
GATE Gate Drive
GND (IC Ground)
The ground potential of the IC.
ICOMP (Current Loop Compensation)
Low pass filter and compensation of the current control
loop. The capacitor which is connected at this pin
integrates the output current of OTA6 and averages the
current sense signal.
FREQ (Frequency Setting)
This pin allows the setting of the operating switching
frequency by connecting a resistor to ground. The
frequency range is from 21kHz to 250kHz.
Package PG-DSO-8
OVP
A resistive voltage divider from bulk voltage to GND
can set the over voltage protection threshold. This
additional OVP is able to ensure system safety
operation.
ISENSE
GND
ICOMP
FREQ
P-DSO-8
GATE
VCC
VSENSE
OVP
VSENSE
VSENSE is connected via a resistive divider to the bulk
voltage. The voltage of VSENSE relative to GND
represents the output voltage. The bulk voltage is
monitored for voltage regulation, over voltage
protection and open loop protection.
VCC
VCC provides the power supply of the ground related
to IC section.
Figure 1 Pin Configuration (top view)
GATE
GATE is the output for driving the PFC MOSFET.Its
gate drive voltage is clamped at 15V (typically).
1.2 Pin Functionality
ISENSE (Current Sense Input)
The ISENSE Pin senses the voltage drop at the
external sense resistor (R_SHUNT). This is the input signal
for the average current regulation in the current loop. It
is also fed to the peak current limitation block.
During power up time, high inrush currents cause high
negative voltage drop at R_SHUNT, driving currents out of
pin 1 which could be beyond the absolute maximum
Version 2.0
5
5 May 2010