TC1782 Datasheet, PDF (47/130 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1782
PinningTC1782 Pin Configuration
Table 2
Pin Definitions and Functions (PG-LQFP-176-10 / PG-LQFP-176-20
Package) (cont’d)
Pin Symbol
Ctrl. Type Function
113 TDO
DAP2
I/O A2/ JTAG Serial Data Output
I/O ^PU Device Access Port Line 2
BRKIN
I
OCDS Break Input Line
BRKOUT
O
OCDS Break Output Line
114 TRST
I
I / JTAG Reset Input
PD
115 TCK
DAP0
I
A1/ JTAG Clock Input
I
PD _{Device Access Port Line 0}
118 TESTMODE I
I / Test Mode Select Input
PU
120 ESR1
I/O A2/ External System Request Reset Input 1
PD
121 PORST
I
I / Power On Reset Input
PD
122 ESR0
I/O A2 External System Request Reset Input 0
Default configuration during and after reset is
open-drain driver. The driver drives low during
power-on reset.
1) Only available for SAK-TC1782F-320F180HR, SAK-TC1782F-320F180HL, and SAK-TC1782F-320F160HR.
2) For the emulation device (ED), this pin is bonded to VDDSB (ED Stand By RAM supply). In the production
devide device, this pin is bonded to a VDD pad.
Legend for Table 2
Column “Ctrl.”:
I = Input (for GPIO port lines with IOCR bit field selection PCx = 0XXX_B)
O = Output
O0 = Output with IOCR bit field selection PCx = 1X00_B
O1 = Output with IOCR bit field selection PCx = 1X01_B (ALT1)
O2 = Output with IOCR bit field selection PCx = 1X10_B(ALT2)
O3 = Output with IOCR bit field selection PCx = 1X11(ALT3)
Column “Type”:
A1 = Pad class A1 (LVTTL)
A1+ = Pad class A1+ (LVTTL)
A2 = Pad class A2 (LVTTL)
Data Sheet
40
V 1.4.1, 2014-05