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C164CI_02 Datasheet, PDF (406/484 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller
C164CI/C164SI
Derivatives
System Reset
Clock Generation Control
Pins P0H.7, P0H.6 and P0H.5 (CLKCFG) select the basic clock generation mode during
reset. The oscillator clock either directly feeds the CPU and peripherals (direct drive), is
divided by 2 or is fed to the on-chip PLL which then provides the CPU clock signal
(selectable multiple of the oscillator frequency, i.e. the input frequency). These bits are
latched in register RP0H.
Table 20-6 C164CI Clock Generation Modes
(P0H.7-5) CPU Frequency External Clock
(CLKCFG) fCPU = fOSC × F Input Range1)
Notes
111
fOSC × 4
2.5 to 6.25 MHz
Default configuration
110
fOSC × 3
3.33 to 8.33 MHz –
101
fOSC × 2
5 to 12.5 MHz
–
100
011
fOSC × 5
fOSC × 1
2 to 5 MHz
1 to 25 MHz
–
Direct drive2)
010
fOSC × 1.5
6.66 to 16.6 MHz –
001
fOSC / 2
2 to 50 MHz
CPU clock via prescaler
000
fOSC × 2.5
4 to 10 MHz
–
1) The external clock input range refers to a CPU clock range of 10 … 25 MHz.
2) The maximum frequency depends on the duty cycle of the external clock signal.
In emulation mode pin P0.15 (P0H.7) is inverted, i.e. the configuration ‘111’ would select direct drive in
emulation mode.
Default: On-chip PLL is active with a factor of 1:4.
Watch the different requirements for frequency and duty cycle of the oscillator input clock
for the possible selections.
Oscillator Watchdog Control
The on-chip oscillator watchdog (OWD) may be disabled via hardware by (externally)
pulling the RD line low upon a reset, similar to the standard reset configuration via
PORT0. At the end of an external reset, bit OWDDIS in register SYSCON reflects the
inverted level of pin RD at that time. The software may again enable the oscillator
watchdog by clearing bit OWDDIS before the execution of EINIT.
Note: If direct drive or prescaler operation is selected as basic clock generation mode
(see above) the PLL is switched off whenever bit OWDDIS is set (via software or
via hardware configuration).
User’s Manual
20-19
V3.1, 2002-02