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V23818-N15-L17 Datasheet, PDF (4/27 Pages) Infineon Technologies AG – Small Form Factor Single Mode 1300 nm Multirate up to 2.5 Gbit/s Transceiver 2x5/2x10 Pinning with LC™ Connector
V23818-N15-Lxx/Lxxx
Pin Configuration
Figure 2
Tx
MS HL
HL
10 9 8 7 6
TOP VIEW
Rx
MS HL
12345
HL
2x5 Pin Connect Diagram
File: 1331
2x5 Pin Description
Pin Symbol Level/Logic
No.
Description
1
VEEr
Ground
Receiver signal ground
2
VCCr
Power supply
Receiver power supply
3
SD
LVTTL or LVPECL output1) Receiver optical input level monitor
4
RD–
LVPECL output
Receiver data out bar
5
RD+
LVPECL output
Receiver data out
6
VCCt
Power supply
7
VEEt
Ground
8
TDis
LVTTL input
Transmitter power supply
Transmitter signal ground
Transmitter disable
9
TD+
LVPECL input
Transmitter data in
10 TD–
LVPECL input
Transmitter data in bar
MS
Mounting studs
HL2)
Housing leads
1) LVPECL output active high for V23818-N15-L37/L36.
LVTTL output active high for V23818-N15-L47/L46.
2) Housing leads removed for V23818-N15-L46WH. Due to possible EMI performance issues, use of this
transceiver should be restricted to applications where the chassis is completely sealed and the transceiver
encapsulated within.
VEEr / VEEt
For 2x10 transceivers, connect pins 2, 3, 6, 12 and 16 to signal ground. For 2x5
transceivers, connect pins 1 and 7 to signal ground.
Data Sheet
4
2003-08-18