TLE4470_08 Datasheet, PDF (4/24 Pages) Infineon Technologies AG – Dual Low-Drop Voltage Regulator Very low dropout

TLE 4470
Table 2
Pin No.
1
2
3, 4, 5
6
7
8
9
10, 11, 12
13
14
PG-DSO-14
Symbol Function
D
Reset delay; connect a capacitor C_D to GND for delay time
adjustment
DIS
Disable input main regulator; Q2 disabled with high signal
GND
Ground
RQ
Reset output; the open collector output is connected to Q1
via an integrated 30 kΩ resistor
SQ
Sense output; the open collector output is connected to Q1
via an integrated 30 kΩ resistor
Q1
Stand-by regulator output voltage; block to GND with a
capacitor, C_Q1 ≥ 6 µF, ESR < 10 Ω at 10 kHz
Q2
Main regulator output voltage; 5 V output tracking to Q1,
block to GND with a capacitor C_Q2 ≥ 10 µF, ESR < 10 Ω at
10 kHz
GND
Ground
I
Main and stand-by regulator input voltage; block to GND
directly at the IC with a ceramic capacitor
SI
Sense comparator input
RADJ: Adjustable reset switching threshold is not available in the PG-DSO-14 package.
Reset is always triggered at the internal threshold.
ADJ2: Main regulator adjust input is internally connected to V_Q2.
Data Sheet
4
Rev. 1.2, 2008-03-20