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PEB3456E Datasheet, PDF (388/424 Pages) Infineon Technologies AG – Channelized T3 Termination with DS3 Framer, M13 Multiplexer, T1/ E1 Framers and 256 Channel HDLC/PPP controller
PEB 3456 E
VCRC
Valid CRC Count Pattern
Register Description
Access
Address
Reset Value
: read/write
: 15H
: 0000H
15
12
CRC22(3:0
11
8
CRC21(3:0)
7
4
CRC12(3:0)
3
0
CRC11(3:0)
CRC22
CRC21
CRC12
CRC11
CRC2 Pattern Definition
The bit fields CRC21 and CRC22 determine the Sa-bit error indication
pattern to be reported in register CRC2.
Only valid if RCR2.PAS is set to ’1’.
CRC1 Pattern Definition
The bit fields CRC11 and CRC12 determine the Sa-bit error indication
pattern to be reported in register CRC1.
Only valid if RCR2.PAS is set to ’1’.
Data Sheet
388
05.2001