PEB3456E Datasheet, PDF (128/424 Pages) Infineon Technologies AG – Channelized T3 Termination with DS3 Framer, M13 Multiplexer, T1/ E1 Framers and 256 Channel HDLC/PPP controller

PEB 3456 E
Functional Description
4.13.1.3 Port Interrupts
Port interrupt vectors indicate the synchronous or asynchronous state of a port.
Immediately after enabling both, the port and the port interrupts, port interrupts are
generated indicating the synchronous or asynchronous state of a port. After this initial
interrupt vector generation, further interrupts are written only when the state of a port
changes from synchronous state to asynchronous state or vice versa. Port interrupts are
enabled by resetting the corresponding mask bit in register PMR.
Transmit interrupts
•
31 30 29 28 27 26
24
17 16
1
10_B
10_B
QUEUE(2:0)
0 0 0 0 0 0 SYN ASYN
15
54
0
00000000000
PORT(4:0)
PORT
SYN
ASYN
Port Number
This bit field identifies the port for which the information in the interrupt
vector is valid.
Synchronization achieved
Port has changed from asynchronous state to synchronous state. This
interrupt is available for ports configured in T1 or E1 mode. In
unchannelized mode there is no synchronous state.
A transmit port changes to the synchronous state, if common transmit
frame synchronization is enabled and the number of bits between two
synchronization pulses is equal to the number of frame bits of the
selected mode or is equal to a multiple of that number. The first CTFS
pulse after a port is enabled causes the transmitter to change to the
synchronous state.
In case the common transmit frame synchronization is disabled, i.e. the
looped timing bit or the CTFS disable bit of a port is set in PMR, the initial
asynchronous state will not be left.
Asynchronous State
The transmitter generates an ’Asynchronous State’ interrupt vector if a
port has changed from synchronous to asynchronous state. This
interrupt is available for ports configured in T1, E1 mode. In
Data Sheet
128
05.2001